• ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …in clock domain crossing (CDC) analysis and closure, while also contributing to RTL design and microarchitecture development. You will ensure robust and reliable ... Location:San Jose, California, US + Area of InterestEngineer - Hardware + Compensation Range191400 USD - 281400 USD +...constraints, and drive full-chip CDC closure efforts. + Mentor RTL design owners on CDC analysis techniques,… more
    Cisco (10/17/25)
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  • Physical Design Manager

    Cadence Design Systems, Inc. (Austin, TX)
    …deep knowledge of the complete physical design flow. In this role you will drive RTL to GDS flow for microprocessor design , Engage with foundry & design ... a challenge.ng and rewarding opportunity for a highly motivated engineer with a passion for innovation and a proven...modern life depends on. We are a global electronic design automation company, providing software, hardware , and… more
    Cadence Design Systems, Inc. (09/24/25)
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  • AE Director

    Cadence Design Systems, Inc. (Cary, NC)
    …the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware , and intellectual property to ... the skills and expertise you gain as an Application Engineer here at Cadence will put you miles ahead...support simulation and verification flows to se c ure design wins + C hampion the c ustomer needs… more
    Cadence Design Systems, Inc. (08/02/25)
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  • AR/VR Silicon Architect

    Meta (Redmond, WA)
    …or equivalent practical experience 10. 8+ years of experience as a Digital Design Engineer , Silicon, Architect, and Silicon Architect for production silicon ... working with a small group of experts specialized in data compression to design end-to-end compression and streaming solutions for VR and AR. The position requires… more
    Meta (10/11/25)
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