• Digital IC Design Engineer

    Medtronic (Mounds View, MN)
    …Day in the Life** We have a great opportunity for an experienced ASIC / FPGA Digital Design Engineer with RTL experience in Verilog or VHDL - System Verilog ... the next IC iteration + Modify or develop new RTL files using System Verilog + Develop block level...+ Develop and execute characterization level testing on the hardware using python or other lab scripting languages At… more
    Medtronic (10/14/25)
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  • Electrical Design Engineer

    Lockheed Martin (Chelmsford, MA)
    **Description:** You will be the Electrical Design Engineer for Lockheed Martin's Chelmsford, MA campus\. Our team drives cutting edge digital and FPGA designs, ... systems\. **What You Will Be Doing** As the Electrical Design Engineer you will create and verify...Engineer you will create and verify innovative digital hardware solutions that meet demanding system requirements\. You will… more
    Lockheed Martin (10/08/25)
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  • Senior Design for Debug Architect…

    NVIDIA (Santa Clara, CA)
    …logic analyzers and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis, timing ... Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement...! NVIDIA is seeking a DFD Architect to implement hardware and software solutions to debug world's leading SoC's… more
    NVIDIA (09/10/25)
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  • Senior CPU Design Engineer

    NVIDIA (Hillsboro, OR)
    We are looking for a Senior CPU Design Engineer ! NVIDIA is seeking best-in-class CPU Design Engineers to design the world's leading CPUs. This position ... the physical design team ensuring a routable and physically implementable design . + Support hardware engineering activities including chip floor plan,… more
    NVIDIA (09/16/25)
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  • Sr. ASIC Design Engineer

    Amazon (Austin, TX)
    … quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, area and ... Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our...power-efficient RTL designs to meet project specifications and targets *… more
    Amazon (09/13/25)
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  • Senior Circuit Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Circuit Design Engineer ! NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 25 ... Work as part of a global circuits team to design innovative circuits for hardware security, adaptive... and physical implementation of custom digital IPs from RTL to layout using industry standard tools and custom… more
    NVIDIA (09/03/25)
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  • Senior Applications Engineer - DDR…

    Cadence Design Systems, Inc. (San Jose, CA)
    …on memory subsystem verification and/or performance analysis* Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA design * ... an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San...modern life depends on. We are a global electronic design automation company, providing software, hardware , and… more
    Cadence Design Systems, Inc. (10/11/25)
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  • Design Verification Engineer

    Microsoft Corporation (Redmond, WA)
    …to millions of people across the planet. We are looking for a design verification engineer to work in the Accelnet Hardware team. You will be part of the ... the computing stack. This is a unique opportunity for design verification engineers to see Register-Transfer Level ( RTL...address functional scenarios in discussions with the software and hardware design teams. + Execute the test… more
    Microsoft Corporation (10/14/25)
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  • Senior Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …engineers to help achieve that mission. We are looking for a **Senior** ** Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System ... Microsoft Silicon, Cloud Hardware , and Infrastructure Engineering (SCHIE) is the team...on Intellectual Property (IP) microarchitecture specification, Register Transfer Level ( RTL ) design , synthesis/Lint/CDC/FEV and System on Chip… more
    Microsoft Corporation (10/11/25)
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  • Senior ASIC Physical Design Engineer

    NVIDIA (Santa Clara, CA)
    …Deep understanding of hardware architecture and hands-on skills in RTL /logic design for timing closure. + Experience in clock-domain-crossing checking, ... are now looking for a motivated Senior ASIC Physical Design Engineer , Netlisting to join our dynamic...in logic equivalence checking/FV required from RTL to tapeout with industry-standard tools.… more
    NVIDIA (10/07/25)
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