- Google (Mountain View, CA)
- Staff ASIC Design Verification Engineer , Platforms and Devices _corporate_fare_ Google _place_ Mountain View, CA, USA **Advanced** Experience owning outcomes and ... release. + Experience strategizing and verifying digital logic at RTL and GLS level using SystemVerilog or C/C++ or...the verification of Googles SOC offerings. You collaborate with hardware architects and design engineers for functional,… more
- Microsoft Corporation (Austin, TX)
- …and optimize the Cloud infrastructure. We are looking for a **Principal Design Verification** ** Engineer ** to join the team. **Responsibilities** + Technically ... Microsoft Silicon, Cloud Hardware , and Infrastructure Engineering (SCHIE) is the team...based functions and features. + Interact with architects and design engineers to create testplans covering verification strategy, test… more
- Google (Mountain View, CA)
- ASIC Design Verification Engineer , Devices and Services _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving ... unparalleled performance, efficiency, and integration. As an Application-Specific Integrated Circuit (ASIC) Design Verification Engineer , you will be part of a… more
- Microsoft Corporation (Raleigh, NC)
- …manage and optimize the Cloud infrastructure. We are looking for a **Senior Design Verification Engineer ** to join the team. **Responsibilities** + Perform ... Microsoft Silicon, Cloud Hardware , and Infrastructure Engineering (SCHIE) is the team...suites, and closing coverage. + Interact with architects and design engineers to create testplans covering verification strategy, test… more
- Microsoft Corporation (Mountain View, CA)
- …state-of-the-art converged solutions, software tools, and automation to support silicon design areas, including RTL (Register Transfer Level) and VIP(Verification ... IP(Intellectual Property) integration. **We are looking for a Principal Engineer , Front-End Computer-Aided Design Software to join...team. + Work in close collaboration with the CAD Hardware and Compute infrastructure teams. + Design … more
- Amazon (Austin, TX)
- …hire for in the United States. In Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but across the industry. The ... while also being deeply important to our customers. We design and build every component of our hardware...* Write Tcl or PERL scripts to improve physical design flows and methods * Collaborate with RTL… more
- Northrop Grumman (Beavercreek, OH)
- …will have experience with: + RTL modeling and simulation + Full FPGA design flow + FPGA integration into custom hardware + FPGA debugging, timing analysis, ... NG Microelectronics Center is seeking a Principal/Sr. Principal Digital Engineer (FPGA) in Beavercreek, OH (Dayton, OH) to support...OH (Dayton, OH) to support architecture definition and product design . We are seeking engineers with the desire to… more
- Silvus Technologies (Irvine, CA)
- …a fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
- Amazon (Austin, TX)
- …learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server ... Machine Learning Acceleration team you'll be responsible for the design and optimization of Hardware in our...project tracking and visualizing QoR/stats - Interface directly with RTL , Physical Design , Package Design ,… more
- Amazon (Cupertino, CA)
- …member of the Cloud-Scale Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers including AWS ... of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze...infrastructure to improve compute and storage utilization for physical design work. Interface directly with RTL , Physical… more
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