• Intern 2026: Software Engineer…

    IBM (San Jose, CA)
    …and technology landscape includes Research, Software, and Infrastructure. Entering this domain positions you at the heart of IBM, where growth and innovation thrive ... towards state-of-the-art chip architecture, design, fabrication and advanced chip packaging . Background knowledge of computer science, data science, machine learning… more
    IBM (09/19/25)
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  • Packaging Engineering Intern

    Texas Instruments (Dallas, TX)
    …organizations to help with the design, development, and analysis of different semiconductor packaging technologies to enable differentiation for TI's analog and ... cross-functional teams to develop internal and external solutions for semiconductor packaging technologies, including Wirebond, Flip Chip,...Put your talent to work with us as a Packaging Engineering Intern ! Texas Instruments will… more
    Texas Instruments (09/06/25)
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  • High Voltage Packaging Engineering

    Texas Instruments (Dallas, TX)
    **Change the world. Love your job.** Texas Instruments is seeking a High Voltage Packaging Engineering Manager. In this role, you will direct development of new ... transportation, and use of products. As a High Voltage Packaging Engineering Manager, you may also select,...Voltage (200V-3300V must) and high power (5KW - 300KW) semiconductor packaging across GaN / SIC /… more
    Texas Instruments (10/15/25)
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  • Optical Packaging Engineer

    Texas Instruments (Dallas, TX)
    …of optical fibers to semiconductor chips.** + **Experience in semiconductor packaging technology, including die attach, wire bonding, flip-chip, and ... **Optical Packaging Engineer** **Location: Dallas, TX or Santa Clara,...to develop technologies to enable new markets. **About the Position ** **Kilby Labs is seeking a highly motivated and… more
    Texas Instruments (09/02/25)
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  • Staff Design Engineer, TSV Packaging

    Micron Technology, Inc. (Boise, ID)
    …Influence, Collaborate, Partner and Implement. **Responsibilities:** + Stay up-to-date on semiconductor and advanced electronics packaging technologies like High ... finite element analysis, modeling and validation of electronic packages in Semiconductor industry or equivalent. + Engineering tools: ANSYS Workbench,… more
    Micron Technology, Inc. (10/08/25)
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  • Principal Engineer, Packaging

    SanDisk (Milpitas, CA)
    …will work in the Packaging R&D group on thermal designs across semiconductor packaging level, flash product printed circuited board assembly (PCBA) level, ... and thermal environments. **Qualifications** REQUIRED: + Ph.D. in Mechanical Engineering plus >3 years, or MS in Mechanical ...experience required in thermal modeling and measurements of IC packaging and related areas. + A strong background in… more
    SanDisk (09/05/25)
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  • Career Accelerator Program - Packaging

    Texas Instruments (Dallas, TX)
    …organizations to help with the design, development and analysis of different semiconductor packaging technologies to enable differentiation for TI's analog and ... the businesses to design and develop internal and external solutions for semiconductor packaging technologies, including Wirebond, Flip Chip, Modules, SIPs and… more
    Texas Instruments (09/06/25)
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  • Packaging Engineer

    Texas Instruments (Santa Clara, CA)
    …of innovation in High Voltage (200V-3300V must) and high power (5KW - 300KW) semiconductor packaging across GaN / SIC / IGBT, Super Junction MOSFET technologies ... presenting at international conferences or symposiums related to power electronics, semiconductor packaging , or high-voltage technologies **Base Range Info:**… more
    Texas Instruments (09/26/25)
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  • Packaging Technical Leader

    Cisco (San Jose, CA)
    …**Minimum Qualifications :** + 6+ years of progressive industry experience in Semiconductor Packaging or Photonic packaging or Assembly process ... Packaging Technical Leader Apply (https://jobs.cisco.com/jobs/Login?projectId=1450253) + Location:San Jose,...10/30/2025.** **Job posting may be removed earlier if the position is filled or if a sufficient number of… more
    Cisco (10/02/25)
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  • Packaging Engineer

    Ralliant (Hollister, CA)
    **General Responsibilities:** As a Packaging Engineer with Pacific Scientific EMC, you will embed with Shipping as the internal customer to provide day-to-day ... packaging support with a focus on safety, quality, productivity,...compliance. Additionally, you will be part of the Manufacturing Engineering department, assisting and being assisted by a team… more
    Ralliant (08/29/25)
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