• Senior Principal FPGA Verification…

    BAE Systems (Westminster, CO)
    … Verification Matrix. + Work collaboratively and in tandem with system architects, FPGA design engineers, and embedded software engineers. + Maintain a regular ... Secretary of Education, US Department of Education. + Solid FPGA / ASIC Verification development methodology. + Experience with...be available based on position level and/or job specifics. ** Senior Principal FPGA Verification Engineer - $15K… more
    BAE Systems (09/09/25)
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  • Principal FPGA / Rtl Design Engineer…

    Silvus Technologies (Irvine, CA)
    …aspects of the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel ... fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Principal FPGA / RTL Design Engineer- Signal Processing_**...presentation skills. + Experience with wireless communication systems on FPGA or ASIC designs. WORKING CONDITIONS &… more
    Silvus Technologies (10/15/25)
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  • Sr. Technical Program Manager, ASIC

    Amazon (San Diego, CA)
    …of managing various phases of pre-silicon such as architecture, front end design , pre-silicon verification, FPGA prototyping, Emulation, Physical design , ... with engineering leaders ( ASIC /SOC leads) to create project execution plans for ASIC /SOC development considering all criteria to design products the meet the… more
    Amazon (11/26/25)
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  • Senior FPGA Development Engineer,…

    Amazon (Denver, CO)
    …as well as performance, power, area analysis and trade-offs - Experience with modern ASIC / FPGA design and verification tools - Experience with SOC bring-up ... connectivity and is looking for help. AWS seeks a Senior FPGA Development Engineer with experience developing...build end to end 100G+ solutions. - Collaborate with design and system engineers to perform tradeoffs and architect… more
    Amazon (10/10/25)
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  • Senior Logic Design Manager…

    Teradyne (North Reading, MA)
    …take a closer look at the minimum criteria for the position. + Minimum of 10 years of FPGA / ASIC design experience. + Minimum of 5 years of experience as an ... FPGA / ASIC project lead, driving multiple projects from...project lead, driving multiple projects from concept, architecture exploration, design implementation, lab validation to production release. + 3-5… more
    Teradyne (11/19/25)
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  • Principal Digital Verification Engineer/…

    Northrop Grumman (Linthicum Heights, MD)
    …standard bus or I/O interfaces + Experience with SystemVerilog Assertions (SVA) + FPGA / ASIC design and/or development process experience + Experience with ... to join our team as a Principal Digital Verification Engineer/ Senior Principal Digital Verification Engineer based out of Linthicum,...Digital Verification Engineering to support ASIC and FPGA product development. + Work closely with design more
    Northrop Grumman (10/03/25)
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  • Senior Hardware Systems Design

    NVIDIA (Austin, TX)
    design rule, layout and timing checks. + Collaborate with architecture, ASIC , FPGA , mixed signal, software and system design teams to develop end to end ... least 5+ years of proven experience in ASIC or FPGA verification or board design / signal integrity experience + Excellent verbal, written and presentation… more
    NVIDIA (09/25/25)
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  • Senior Hardware Systems Design

    Google (Sunnyvale, CA)
    Senior Hardware Systems Design Engineer, Board...goals are met with systems and will work with ASIC / FPGA , software, and verification teams to ensure ... data center engineering, server, storage, and networking products. + Experience with FPGA /CPLD design and interfacing with other disciplines, including software,… more
    Google (10/30/25)
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  • Senior Applications Engineer - DDR…

    Cadence Design Systems, Inc. (San Jose, CA)
    …subsystem verification and/or performance analysis* Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA design * Knowledge of ... want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe Cadence IP team… more
    Cadence Design Systems, Inc. (10/11/25)
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  • Staff Lead Design Verification Engineer

    Northrop Grumman (Annapolis Junction, MD)
    …all within a culture of design . We are seeking an exceptional Senior Functional Verification Engineer specializing in ASIC and FPGA technologies. ... & Test (SEIT) department is seeking a Staff Lead Design Verification Engineer to join our team and develop...requirements **Functional Verification:** + Conduct in-depth behavioral simulations across ASIC and FPGA + Generate and execute… more
    Northrop Grumman (10/16/25)
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