- NVIDIA (Santa Clara, CA)
- … tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you ... or Computer Engineering or equivalent experience. + 8+ years experience in Physical design /Timing. + Experience in full-chip/sub-chip Static Timing Analysis… more
- Northrop Grumman (Morrisville, NC)
- …or propose changes to fix them + Work closely with design , verification, design -for-test and physical design teams to optimize the timing and improve ... (VHDL/Verilog/SystemVerilog) + Experience in the full product life cycle of ASIC Design + Effective communication and presentation skills and high proficiency in… more
- NVIDIA (Santa Clara, CA)
- …5+ years' experience or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO implementation, ... to collaborate with cross-functional teams. + Strong understanding of timing and physical design fundamentals Ways to stand out from the crowd: + Familiarity… more
- Broadcom (Fort Collins, CO)
- …the analog functions required to realize the IP. This manager will work closely with the physical design team that builds the design in leading edge CMOS ... project. + Work effectively as part of a cross-functional team including analog design , physical design , design -for-test, firmware development, silicon… more
- Parsons Corporation (Fort George G Meade, MD)
- …approved reverse engineering procedures + Integrate new P&R tools, P&R tool updates, and ASIC or FPGA design libraries into Government's computer aided design ... and Assist other physical designers to successfully complete their specific P&R design tasks + Lead the designs of new products and processes and improve and… more
- Microsoft Corporation (Redmond, WA)
- … design /Register Transfer Level (RTL) entry + RTL to GDS implementation in Physical Design domain, from synthesis to place and route of partitions through ... engineers around the world. We are looking for a ** Senior Quantum Engineer - Cryo-CMOS Digital Circuit Design...entry + Experience in RTL to GDS implementation in Physical Design domain, from synthesis to place… more
- GE Aerospace (Pompano Beach, FL)
- …more sustainable flight and believe in our talented people to make it happen. The Senior Engineer - FPGA Design will play a critical role in designing, ... custom logic designs into cutting-edge aerospace products. Your expertise in digital design , verification, and FPGA/ ASIC development will contribute to the… more
- Microsoft Corporation (Redmond, WA)
- …hardware designers and software engineers around the world. We are looking for a ** Senior Quantum Engineer - CryoCMOS Analog Circuit Design ** . Our CryoCMOS team ... is looking for an experienced application-specific integrated circuit ( ASIC ) designer to participate in the research and development of essential building blocks in… more
- Silvus Technologies (Los Angeles, CA)
- …a fulfilling career. THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of...skill. + Experience with communication systems on FPGA or ASIC designs. **COMPENSATION** _The pay range is NOT a… more
- Cisco (San Jose, CA)
- Senior Analog/mixed-signal IC Design Engineer - Acacia Apply (https://jobs.cisco.com/jobs/Login?projectId=1443040) + Location:San Jose, California, US + ... accuracy, analog designs for optical communications products. We optimize design that will integrate into the ASIC ....power how humans and technology work together across the physical and digital worlds. These solutions provide customers with… more