- SpaceX (Sunnyvale, CA)
- …with chip architects, ASIC engineers, package engineers and block level physical design engineers to drive, chip floorplan reviews and identify area, ... computer engineering or computer science + 5+ years of ASIC and/or physical design flow...and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer/ Senior : $170,000.00 -… more
- Silvus Technologies (Irvine, CA)
- …a fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of...skill. + Experience with communication systems on FPGA or ASIC designs. **COMPENSATION** _The pay range is NOT a… more
- NVIDIA (Santa Clara, CA)
- …+ Domain & Technical Expertise: Deep knowledge in EDA/VLSI (eg, synthesis, physical design , verification, timing, reliability, or CAD algorithms) combined with ... We are now looking for a Senior Research Scientist! NVIDIA is seeking a ...+ Apply deep learning and GPU computing to improve ASIC and VLSI design tool flows. +… more
- Microsoft Corporation (Mountain View, CA)
- …for passionate engineers to help achieve that mission. We are looking for a ** Senior Design Engineer** to work in the dynamic Microsoft Artificial Intelligence ... program you will be interacting with various teams, including architecture, verification, and physical design , ensuring that the design is implemented and… more
- Silvus Technologies (Irvine, CA)
- …+ Experience using MATLAB. + Experience with communication systems on FPGA or ASIC designs. WORKING CONDITIONS & PHYSICAL REQUIREMENTS + Office environment. + ... to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Senior FPGA/RTL Design Engineer_** who will report to the _Director of FPGA Engineering_ on the… more
- Cisco (Milpitas, CA)
- …features. **Your Impact** We are seeking a highly experienced and accomplished FPGA Senior Design Engineer to provide technical leadership and deep expertise in ... with a Bachelors' degree. Experience expected to be in ASIC /FPGA design . + Experience in end-to-end FPGA...power how humans and technology work together across the physical and digital worlds. These solutions provide customers with… more
- NVIDIA (Santa Clara, CA)
- …you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask Layout Design Engineer! Someone who is excited to join a growing and ... high-speed mixed-signal circuit designs. What you'll be doing: + Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog… more
- NVIDIA (Santa Clara, CA)
- … Engineer? If yes, We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic ... high-speed mixed-signal circuit designs. What you'll be doing: + Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog… more
- Cisco (San Jose, CA)
- …()25Gb/s), and high accuracy, analog designs for optical communications products. We optimize design that will integrate into the ASIC . Our team interacts with ... other Acacia groups including digital/DSP design , system design , package design ,...power how humans and technology work together across the physical and digital worlds. These solutions provide customers with… more
- Amazon (Cupertino, CA)
- …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... Proficient in programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design , and methodologies including synthesis, place… more