• Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are looking for a Senior ASIC Design Engineer to join our Switch Silicon team. As a Design Engineer at NVIDIA, you'll join a group of hardworking ... high bandwidth data paths. + A deep understanding of ASIC design flows including RTL design, verification ,...of ASIC design flows including RTL design, verification , logic synthesis and timing analysis. + Strong interpersonal… more
    NVIDIA (11/20/25)
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  • Senior ASIC Physical Design…

    Google (Sunnyvale, CA)
    Senior ASIC Physical Design Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and mentoring ... focus on TPU architecture and its integration within AI/ML-driven systems. As an ASIC Physical Design Engineer , you will collaborate with RTL, Design for… more
    Google (12/18/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... next generation GPUs + Partner with RTL and Design Verification engineers to ensure delivery meets performance and quality...ASIC design flow including front end design and verification , DFT, and timing analysis + Strong team player… more
    NVIDIA (11/26/25)
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  • Senior ASIC Power Engineer

    Google (Sunnyvale, CA)
    Senior ASIC Power Engineer ,...loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a ... equivalent practical experience. + 5 years of experience in logic design, digital ASIC , or SoC design. + Experience with RTL (Register Transfer Level) design using… more
    Google (12/30/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams. + Get involved...DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes,… more
    NVIDIA (10/28/25)
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  • Senior ASIC Front End Infrastructure…

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking elite ASIC RTL/ Verification ASIC engineers to develop the core Verification and RTL infrastructure of the world's leading GPUs. This ... large, distributed computing environments + Continuous Integration pipeline and/or pre-submit verification flow experience, for example using Jenkins + You should… more
    NVIDIA (10/28/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most… more
    NVIDIA (10/25/25)
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  • Senior ASIC Design Engineer

    Palo Alto Networks (Santa Clara, CA)
    …and the kind of precision that drives great outcomes. **Your Career** Join our ASIC team and help deliver the digital logic that powers our next-generation firewall ... design from specification through silicon bring-up, working with world-class verification and physical-design engineers to hit aggressive performance, power, and… more
    Palo Alto Networks (12/15/25)
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  • Senior Engineer - FPGA/ ASIC

    BAE Systems (Huntsville, AL)
    …Other incentives may be available based on position level and/or job specifics. ** Senior Engineer - FPGA/ ASIC Design (Hybrid)** **117732BR** EEO Career ... systems for Department of Defense (DoD) applications. As a Senior Design Engineer , you will have the...of FPGA designs, including design descriptions, test plans, and verification results + Work closely with cross-functional teams, including… more
    BAE Systems (10/24/25)
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  • Principal ASIC Design Engineer

    SpaceX (Redmond, WA)
    …to work extended hours and weekends as needed COMPENSATION & BENEFITS: Pay range: ASIC Design Engineer / Senior : $200,000.00 - $270,000.00/per year Your actual ... Principal ASIC Design Engineer (Silicon Engineering) Redmond,...fully verified, synthesis/timing clean design + Work closely with verification team to ensure all aspects of the design… more
    SpaceX (01/01/26)
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