• Sr. ASIC Design Engineer (Silicon…

    SpaceX (Irvine, CA)
    …work extended hours and weekends as needed COMPENSATION & BENEFITS: Pay range: ASIC Design Engineer/ Senior : $160,000.00 - $220,000.00/per year Your actual level ... Sr. ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply...fully verified, synthesis/timing clean design + Work closely with verification team to ensure all aspects of the design… more
    SpaceX (11/20/25)
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  • Staff Lead Design Verification Engineer

    Northrop Grumman (Jessup, MD)
    …seeking an exceptional Senior Functional Verification Engineer specializing in ASIC and FPGA technologies. The ideal candidate will play a critical role ... Verification :** + Conduct in-depth behavioral simulations across ASIC and FPGA + Generate and execute...Identify and resolve signal delay and performance issues in gate timing requirements + Develop comprehensive Universal Verification more
    Northrop Grumman (12/05/25)
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  • Principal Digital Verification Engineer/…

    Northrop Grumman (Linthicum Heights, MD)
    …DoD secret clearance and Special Program Access (SAP). + 3 years of experience with FPGA or ASIC verification using UVM + Experience developing testplans, ... you to join our team as a Principal Digital Verification Engineer/ Senior Principal Digital Verification ...Program Access (SAP). + 3 years of experience with FPGA or ASIC verification using… more
    Northrop Grumman (10/03/25)
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  • Senior Hardware Systems Design…

    NVIDIA (Austin, TX)
    …Electrical Engineering (or equivalent experience) + At least 5+ years of proven experience in ASIC or FPGA verification or board design / signal integrity ... you will bring to bear your knowledge of RTL verification and system design to develop and implement innovative...rule, layout and timing checks. + Collaborate with architecture, ASIC , FPGA , mixed signal, software and system… more
    NVIDIA (09/25/25)
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  • Senior Digital Verification Engineer…

    Huntington Ingalls Industries (Fort Meade, MD)
    …thinkers who can uncover difficult-to-activate corner-case bugs and vulnerabilities in the gate -level netlists of FPGA and ASIC designs. Candidates ... etc. * UVM concepts * Directed, constrained-random, and assertion-based verification (ABV) techniques at the gate , interface,...Software or hardware reverse-engineering (eg, IDA Pro, Ghidra) * FPGA design or verification * Familiarity with… more
    Huntington Ingalls Industries (10/09/25)
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  • Senior IP Verification Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Verification Engineer! NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 ... IP designs with emphasis on first pass success. + Collaborate and partner with ASIC design engineers, IP architects and other verification engineers to formalize… more
    NVIDIA (09/23/25)
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  • SystemVerilog/UVM Design Verification

    US Tech Solutions (Goleta, CA)
    verification tasks. **Experience:** + 5-8 years of experience in Pre-Silicon Design Verification ( FPGA or ASIC ). + Strong proficiency in SystemVerilog ... of high-performance SoCs and related subsystems. + This role requires a senior -level verification engineer who can work independently and take ownership of … more
    US Tech Solutions (10/14/25)
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  • Senior Logic Design Manager (Teradyne,…

    Teradyne (North Reading, MA)
    …a closer look at the minimum criteria for the position. + Minimum of 10 years of FPGA / ASIC design experience. + Minimum of 5 years of experience as an FPGA / ... on first level manager to lead one of our FPGA development teams. Development occurs in a dynamic and...Git, CVS) and continuous integration. + Familiarity with digital verification tools and methodologies (preferably UVM). + Experience with… more
    Teradyne (11/19/25)
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  • Senior Test and Integration Engineer

    Leidos (Linthicum, MD)
    …and testing of new ASIC designs prior to fabrication using Field Programmable Gate Arrays ( FPGA ) to emulate the chips. + (U//FOUO) Write custom interfaces ... the system design, requirements, and standards. Perform in-depth security verification testing of cryptographic product designs and equipment. **CLEARANCE REQUIRED**… more
    Leidos (11/07/25)
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  • Senior Digital Electrical Engineer…

    GE HealthCare (Aurora, OH)
    …wireless digital architectures for MRI coil systems. + Expertise in developing FPGA / ASIC -based solutions for signal processing and high-speed data transmission. ... Summary** We are seeking a highly skilled and motivated Senior Digital Electrical Engineer to join our MRI RF...medical or high-reliability systems. + Expertise in VHDL/Verilog and FPGA / ASIC design flows. + Strong knowledge of… more
    GE HealthCare (12/06/25)
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