- BAE Systems (Westminster, CO)
- …be available based on position level and/or job specifics. ** Senior Principal FPGA Verification Engineer - $15K Sign-On Bonus** **115638BR** EEO Career ... environment to provide continuously evolving capabilities in space payloads. As an FPGA Verification engineer , you will work with a team of electrical… more
- BAE Systems (Nashua, NH)
- …available based on position level and/or job specifics. ** Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **117194BR** EEO ... your skills, and advancing your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop… more
- BAE Systems (Westminster, CO)
- …may be available based on position level and/or job specifics. ** Senior Principal FPGA Verification Engineer - $15K Sign On Bonus** **115210BR** EEO ... UVM components, and regressions/testlists. + Be responsible for generating and executing the FPGA Verification Test Plan and FPGA Verification Matrix. +… more
- Northrop Grumman (Linthicum Heights, MD)
- …**a Top Secret/SCI security clearance with Polygraph** **.** **Basic Qualifications Senior Principal Digital Verification Engineer :** + Bachelor's ... Secret/SCI security clearance with Polygraph** **.** **Preferred Qualifications Principal / Senior Principal Digital Verification Engineer :** + Advanced… more
- Google (Austin, TX)
- … team. + Develop and manage large-scale regression flows for simulation, emulation, Field-Programmable Gate Array ( FPGA ) platforms, including automated ... Senior CPU Design Verification DevOps Engineer _corporate_fare_ Google _place_ Austin, TX, USA; Mountain View, CA, USA; +3 more; +2 more **Mid** Experience… more
- BAE Systems (Cedar Rapids, IA)
- …be available based on position level and/or job specifics. ** Senior Principal Engineer - ASIC/ FPGA Verification (Hybrid)** **117726BR** EEO Career Site ... execute their precision navigation missions. BAE is looking for experienced senior level ASIC/ FPGA Design Verification Engineers who can plan, architect, and… more
- Huntington Ingalls Industries (Fort Meade, MD)
- …thinkers who can uncover difficult-to-activate corner-case bugs and vulnerabilities in the gate -level netlists of FPGA and ASIC designs. Candidates for this ... etc. * UVM concepts * Directed, constrained-random, and assertion-based verification (ABV) techniques at the gate , interface,...Software or hardware reverse-engineering (eg, IDA Pro, Ghidra) * FPGA design or verification * Familiarity with… more
- Northrop Grumman (Annapolis Junction, MD)
- …design. We are seeking an exceptional Senior Functional Verification Engineer specializing in ASIC and FPGA technologies. The ideal candidate will play ... Test (SEIT) department is seeking a Staff Lead Design Verification Engineer to join our team and...Identify and resolve signal delay and performance issues in gate timing requirements + Develop comprehensive Universal Verification… more
- US Tech Solutions (Goleta, CA)
- … of high-performance SoCs and related subsystems. + This role requires a senior -level verification engineer who can work independently and take ... **Job Description:** + The Verification Engineer will contribute to the...**Experience:** + 5-8 years of experience in Pre-Silicon Design Verification ( FPGA or ASIC). + Strong proficiency… more
- Amazon (Redmond, WA)
- …design team and will work closely with PCBA design engineers, harness engineers, field-programmable gate array ( FPGA ) developers, embedded software ... They will work with design engineers to write design verification plans for power and signal integrity, as well...asylum. Key job responsibilities We are looking for an engineer who combines superb technical and analytical capabilities with… more