- Silvus Technologies (Irvine, CA)
- …a pathway to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Senior FPGA/ RTL Design Engineer_** who will report to the _Director of FPGA ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
- Silvus Technologies (Irvine, CA)
- …OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for Irvine and work ... projects aimed at addressing challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at Silvus' Irvine CA… more
- Silvus Technologies (Irvine, CA)
- …pathway to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Principal FPGA / RTL Design Engineer - Signal Processing_** who will report to the ... Computer Science, or related fields. + Minimum 10 years of demonstrated experience in RTL design and FPGA implementation; 8 years of experience in RTL … more
- Cadence Design Systems, Inc. (San Jose, CA)
- …but is not limited to: + Digital microarchitecture definition and documentation + RTL logic design , debug and functional verification + Strong background in ... and developing flows at all phases of the digital design and functional verification. It is further expected that...the San Jose office. A Cadence satellite office (if senior with extensive SerDes exp.) will be considered. Position… more
- Northrop Grumman (Jessup, MD)
- …deliver remarkable new advantages to the warfighter. We are seeking a front-end ASIC design engineer for design and verification of full-custom digital ... listed below:** **Basic Qualifications for Principal Digital ASIC Circuit Design Engineer Level:** + Bachelor's degree in...design + Working knowledge of the front-end ASIC design flow from RTL to gates (… more
- Microsoft Corporation (Mountain View, CA)
- …converged solutions, automation, and quality assurance checks across front-end areas like RTL & VIP Design , Design Verification, Validation, DFT, ... Emulation, Design Synthesis, RTL Power Anaysis, PD Handoff and SoC integration. This...can deliver cutting-edge silicon solutions for Microsoft. As a Senior Front-End CAD Engineer , you'll drive the… more
- NVIDIA (Austin, TX)
- Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering ... in Perl/Python or other industry-standard scripting languages + Experience in RTL design (Verilog), verification (SystemVerilog), System-On-Chip design… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior ASIC Design Engineer ...bandwidth data paths. + A deep understanding of ASIC design flows including RTL design , ... to join our Switch Silicon team. As a Design Engineer at NVIDIA, you'll join a...document and deliver high performance, area and power efficient RTL to achieve design targets and specifications.… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis and timing analysis.… more
- Google (San Diego, CA)
- Senior ASIC Engineer , IP Design , Silicon _corporate_fare_ Google _place_ Mountain View, CA, USA; San Diego, CA, USA **Mid** Experience driving progress, ... or equivalent practical experience. + 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture. + Experience with a scripting… more