- RTX Corporation (Cedar Rapids, IA)
- …Will Do:** + Requirements capture, ASIC / FPGA digital architecture and design using RTL , timing closure, verification, and system integration + Recommend ... evolving global market. This position is for a motivated Senior Electrical or Computer engineering candidate to be involved...practices for continuous improvement in the group's ASIC / FPGA design flow + Contribute to engineering… more
- RTX Corporation (Aguadilla, PR)
- …Clearance:** None/Not Required Collins Aerospace has an exciting opportunity for a senior experienced ** FPGA Verification Engineer** . In this role you ... coverage tracking + Testbench development for the verification of RTL blocks using VHDL or SystemVerilog + Recommend new...FPGA lab validation with advanced lab equipment + Design for Test (DFT) and manufacturability issues + Experience… more
- RTX Corporation (Cedar Rapids, IA)
- …capture, decomposition, and traceability. + ASIC/ FPGA /SoPC digital architecture development and design . + Develop RTL design code and simulation in ... tools and practices for continuous improvement in the group's ASIC/ FPGA design flow. + Provide guidance or...and minimum 3 years of experience. + Experience writing RTL and testbenches using VHDL, Verilog, or SystemVerilog. +… more
- SpaceX (Hawthorne, CA)
- …Experience working with complex digital designs + Experience in different stages of FPGA development: RTL design , verification, synthesis, timing analysis, ... for versatile, driven, and collaborative engineers. As an Sr. FPGA engineer on the satellite digital design ...+ Implement logic designs and signals processing algorithms in RTL + Integrate designs onto FPGA /SoC platforms… more
- University of Southern California (Arlington, VA)
- …- Digital DesignApply (https://usc.wd5.myworkdayjobs.com/ExternalUSCCareers/job/Arlington-VA/ASIC- FPGA -Research-Engineer Digital- Design \_REQ20157019/apply) ... CS&T Division has an opening in Arlington, VA for anASIC/ FPGA Research Engineer - Digital Design , to...on a cutting-edge team to develop novel computer architectures, RTL models, and systems-on-chip, and will demonstrate system prototypes.… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …but is not limited to: + Digital microarchitecture definition and documentation + RTL logic design , debug and functional verification + Strong background in ... and developing flows at all phases of the digital design and functional verification. It is further expected that...the San Jose office. A Cadence satellite office (if senior with extensive SerDes exp.) will be considered. Position… more
- Butler America (Cedar Rapids, IA)
- …Analog Video, LVDS, etc.) ( Senior Level) Desired Skills: * Familiar with RTL coding in VHDL * Experience using FPGA simulation tools Butler America ... and report project costs and schedules (Principal/Staff level) Desired Skills: * Familiar with RTL coding in VHDL * Experience using FPGA simulation tools *… more
- BrainChip, Inc. (Laguna Hills, CA)
- BrainChip is seeking a Senior Digital Design Engineer to join a team working on cutting-edge and novel AI hardware. The primary job function is to work with team ... gather the relevant information, and develop a solution. Use RTL language to design the digital functional...tools to check the functionalities of the designs in RTL and gate level. Collaborate with other… more
- Amazon (Sunnyvale, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our ... and the full chip. You will participate in the design verification and bring-up of the chip and subsystems...in the lab bring-up of these blocks either in FPGA , emulation, or silicon by potentially writing test scripts,… more
- NVIDIA (Austin, TX)
- …approaches to deliver bug-free board and system designs. + Board and system level RTL design . + Simulation and emulation of model development for board level ... role, you will bring to bear your knowledge of RTL verification and system design to develop...layout and timing checks. + Collaborate with architecture, ASIC, FPGA , mixed signal, software and system design … more