• New Graduate Engineer , Electrical…

    SpaceX (Bastrop, TX)
    New Graduate Engineer , Electrical (Starlink) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... with the ultimate goal of enabling human life on Mars. NEW GRADUATE ENGINEER , ELECTRICAL (STARLINK) Starlink believes in providing fast, reliable internet to serve… more
    SpaceX (12/01/25)
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  • Hardware Engineer

    Cisco (San Jose, CA)
    …across Cisco's extensive hardware portfolio, including system and board design , circuit layout, hardware automation, validation and testing, signal integrity, ... and power design . Working with system designers, diagnostics engineers, customer support...hardware and manage qualification test data analytics. + Perform silicon failure analysis (FA) on ATE and CFT to… more
    Cisco (12/18/25)
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  • Sr Principal Product Engineer - Memory IP

    Cadence Design Systems, Inc. (San Jose, CA)
    …including ATE deployment and production ramp. + Collaborate with internal teams (Analog/ Digital Design , DV, Program Management) to resolve technical issues. + ... About Us Cadence is a pivotal leader in electronic design , building upon more than 30 years of computational...impact in our world. We are seeking a Post Silicon Memory Product Engineer to support … more
    Cadence Design Systems, Inc. (11/22/25)
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  • SoC DFT Engineer , Google Cloud

    Google (Sunnyvale, CA)
    …to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a ... SoC DFT Engineer , Google Cloud _corporate_fare_ Google _place_ Sunnyvale, CA,...architecture, implementation, and verification for SoCs. + Experience in silicon bring-up, debug, or validation of DFT features. +… more
    Google (11/25/25)
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  • Hardware Engineer

    Broadcom (Irvine, CA)
    …with design teams and foundry partner 3. Familiarity with analog and digital design flows and CAD tools 4. Hands-on experience with device/circuit level ... (power performance area cost) assessment and benchmarking, test structure design , silicon characterization and model to ...process technology, device & modeling, process and device reliability, digital & analog IP design , design… more
    Broadcom (11/13/25)
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  • Staff DFT Engineer

    Broadcom (San Jose, CA)
    … debugging, analytical and independent problem solving ability + Strong knowledge of digital design and logical equivalence checking + Experience with Gate level ... The successful candidate will be responsible for developing and implementing DFx ( Design for Test/debug & manufacturability) solutions for Digital , mixed signal… more
    Broadcom (11/26/25)
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  • DFT Engineer

    Broadcom (San Jose, CA)
    …test. **Responsibilities** + Drive the test quality of the products from Design to Production + Participate/contribute in silicon bring-up, characterization, and ... leading most complex and cutting edge network switching ASIC DFx ( Design for Test/debug & manufacturability) from DFT architecture, to implementation, verification,… more
    Broadcom (11/19/25)
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  • Senior Power and Performance Engineer…

    NVIDIA (Santa Clara, CA)
    …work to amplify human inventiveness and intelligence. Choose to join us today. NVIDIA Silicon Solutions Group seeks a hardworking engineer to join a silicon ... solution markets. Prior experience in the lab with system-level post- silicon bring-up and debug is highly desired. What you'll...datacenter or high-perf systems. + Strong fundamentals in EE, digital /analog design , signal integrity, low power … more
    NVIDIA (10/28/25)
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  • ASIC Reliability Engineer

    Cisco (San Jose, CA)
    …San Jose, CA area as this is a hybrid role. **Meet the Team** Cisco Silicon One ASICs are transforming the Future of the Internet and the unified, power-efficient ... architecture is rapidly gaining traction in the market. The Silicon One Productization team takes enables technology, supplier readiness and takes these cutting-edge… more
    Cisco (12/13/25)
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  • Senior ASIC Power Engineer , ML…

    Google (Sunnyvale, CA)
    …or a related field, or equivalent practical experience. + 5 years of experience in logic design , digital ASIC, or SoC design . + Experience with RTL (Register ... Senior ASIC Power Engineer , ML Accelerators _corporate_fare_ Google _place_ Sunnyvale, CA,...behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital… more
    Google (12/30/25)
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