• Senior Hardware Engineer, Geo

    Google (Mountain View, CA)
    …job** Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute ... will shape the next generation of hardware experiences, delivering unparalleled performance , efficiency, and integration. Join a cross-disciplinary team, providing a… more
    Google (12/11/25)
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  • System Engineer (mixed-signal / functional safety)

    Texas Instruments (Tucson, AZ)
    …of ADCs covering 8 to 32 bits in resolution, best in class performance , smallest footprint, and high system-on-chip integration. TI ADC solutions enable a wide ... automotive, medical and more. We are looking to hire an experienced systems engineer/ architect to drive new investment areas for the precision ADC (PADC) team. Those… more
    Texas Instruments (12/09/25)
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  • Software Engineer, ML Compiler

    Meta (New York, NY)
    …graphs to hardware implementations, model data-flows, create cost-benefit analysis and estimate silicon power and performance 3. Contribute to the development of ... successful candidate will be part of our efforts to architect , design and implement a clean slate compiler for...tools 4. Conduct design and code reviews. Evaluate code performance , debug, diagnose and drive resolution of compiler and… more
    Meta (12/02/25)
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  • Principal Mixed-Signal-Analog ASIC Designer

    Ralliant (Boulder, CO)
    …using state-of-the-art design tools and methodologies. **Key Responsibilities** + Architect , design, and manage complex analog and mixed-signal blocks, including ... optimization. + Conduct detailed simulations to validate and optimize circuit performance , yield, and manufacturability. + Perform signal integrity and system-level… more
    Ralliant (11/25/25)
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  • Software Engineer, Systems ML - Compilers

    Meta (Redmond, WA)
    …graphs to hardware implementations, model data-flows, create cost-benefit analysis and estimate silicon power and performance 3. Contribute to the development of ... systems. You will be part of our efforts to architect , design and implement a clean slate compiler for...tools 4. Conduct design and code reviews. Evaluate code performance , debug, diagnose and drive resolution of compiler and… more
    Meta (10/20/25)
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  • SDET Android System Engineer

    FocusKPI Inc. (Mountain View, CA)
    …and execute comprehensive test strategies, including functional, integration, regression, and performance testing, with a focus on core Android internals, APIs, ... maintainable, high-quality, and effective automated tests for Knox services. + Architect , design, and implement advanced test automation frameworks specifically for… more
    FocusKPI Inc. (10/08/25)
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  • Lead Applications Engineer - DDR Design IP

    Cadence Design Systems, Inc. (San Jose, CA)
    …to grow, no matter where you are in your career. We are growing our Silicon Valley team and we are looking for smart, energetic, collaborative and creative people to ... to make a difference and be challenged? Join the High- Performance Culture at Cadence. As a Lead Technical Presales...use your knowledge of different memory interface standards to architect memory solutions for customers using Cadence DDR IP… more
    Cadence Design Systems, Inc. (10/04/25)
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  • AI/ML Engineering internship: SVL

    IBM (San Jose, CA)
    …Models (LLMs) to join our AI/ML Center of Excellence team at the IBM Silicon Valley Lab location. In this role, you will collaborate with cross-functional product ... and tooling. * Establish evaluation datasets and benchmarks to measure LLM performance across various use cases leveraging [1] FM-Eval and Unitxt. LLM Integration… more
    IBM (12/07/25)
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  • Senior Principal, Design Engineering - Thermal

    Celestica (TX)
    …including in-row CDUs. Apply the best technologies to meet customer needs of performance and reliability at the lowest cost. Advise on test and evaluation methods ... for high performance cooling systems. Evaluate suppliers and their technology. Extend...cooling of a chip, where the liquid wets the silicon . This includes the comparison of different fin patterns… more
    Celestica (12/02/25)
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  • MTS Circuit Design Engineer, HSIO

    Micron Technology, Inc. (Folsom, CA)
    …be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Design Engineer you will ... Micron global footprint, in a multiple projects-based environment. **Responsibilities** + Architect high-speed clocking networks for HBM applications in AI and HPC.… more
    Micron Technology, Inc. (11/20/25)
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