- Meta (Sunnyvale, CA)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Design Engineer Responsibilities: 1. Responsible for micro-architecture development. 2. ... Responsible for Lint, CDC, Synthesis, & Power Optimization. 4. Collaborate with verification and emulation teams in test planning, development, and debugging. 5.… more
- Meta (Sunnyvale, CA)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/physical synthesis using advanced ... at RTL & gate level and identify power reduction opportunities. 4. Run formal verification checks between RTL & gate level netlist and debug aborts, inconclusive and… more
- Google (Sunnyvale, CA)
- SoC Physical Design Engineer _corporate_fare_ Google...complex SoC . + Experience with multiple-cycles of SoC in ASIC design. + Experience with ... and its integration within AI/ML-driven systems. As a System on a Chip ( SoC ) Physical Design Engineer , you will collaborate with Register-Transfer Level (RTL),… more
- Northrop Grumman (Linthicum Heights, MD)
- …transfer level (RTL) code of a complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and SystemVerilogl. + Development of ... you to join our team as a Principal Digital Verification Engineer /Senior Principal Digital Verification ...(SAP). + 3 years of experience with FPGA or ASIC verification using UVM + Experience developing… more
- Arrow Electronics (Mountain View, CA)
- … Engineer **Job Description:** Principal Accountabilities * Responsible for architecting Verification Environment for ASIC SoC and providing ... verification support from defining verification plan to multi-million gate product tapeout & for...cover ASIC features. * Develop and debug SoC ASIC platform test FW and specific… more
- Broadcom (San Jose, CA)
- …Computer Science or related degree and 12+ years of proven experience in SoC / ASIC verification or Master's Degree in Electrical Engineering, Computer ... Science or related degree and 10+ years of proven experience in SoC / ASIC verification **Additional Job Description:** **Compensation and Benefits** The… more
- Broadcom (San Jose, CA)
- …RTL verification methodologies including System Verilog. + Strong experience in ASIC design verification flows and DV methodologies + Strong working ... a Candidate Account, please Sign-In before you apply.** **Job Description:** The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC… more
- US Tech Solutions (Goleta, CA)
- **Job Description:** + The Verification Engineer will contribute to the pre-silicon functional verification of high-performance SoCs and related subsystems. ... + This role requires a senior-level verification engineer who can work independently and...**Experience:** + 5-8 years of experience in Pre-Silicon Design Verification (FPGA or ASIC ). + Strong proficiency… more
- BAE Systems (Westminster, CO)
- …by the US Secretary of Education, US Department of Education. + Solid FPGA/ ASIC Verification development methodology. + Experience with System Verilog and UVM, ... specifications, cost, schedule, and resource requirements for FPGA or ASIC verification plans. + Familiarity with Signal...based on position level and/or job specifics. **Principal FPGA Verification Engineer - $15K Sign On Bonus**… more
- Meta (Austin, TX)
- …from transistors, through architecture, firmware, and algorithms. **Required Skills:** Design Verification Engineer Responsibilities: 1. Define and implement ... verification plans, and build test benches for block, IP, sub-system, and SoC level verification 2. Develop functional tests based on verification test… more