• FPGA Design/ Verification Engineer

    Butler America (Sunnyvale, CA)
    FPGA Design/ Verification Engineer Location: Sunnyvale, CA Job ID: #71390 Pay Range: $75-90 The selected candidate will be responsible for ASIC & FPGA ... (DSP), high speed digital design, high speed communication and system-on-chip ( SOC ) implemented on FPGA platforms. Experience with COTS based control platforms… more
    Butler America (11/07/25)
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  • Senior Verification engineer

    Two95 International Inc. (Sunnyvale, CA)
    Hi, Title: Lead / Senior Verification engineer Location: San Jose, CA /...* 5+ or more years of proven experience on ASIC / SoC / IP Verification . ... * Strong experience in SystemVerilog and UVM verification methodologies * Proficiency in Object Oriented programming, computer architecture and data structures * Strong analytical/problem solving skills and pronounced attention to details * Strong… more
    Two95 International Inc. (12/08/25)
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  • Digital Design Engineer

    Meta (Sunnyvale, CA)
    …research silicon to demonstrate and integrate advanced IP and AI accelerators into SOC / ASIC solutions to enable in-system testing and prototyping. The goal is ... 8. Communication and collaboration skills 9. Knowledge of digital SoC integration and ASIC architecture 10. Skilled... architecture 10. Skilled in micro-architecture, RTL coding, design verification and SoC Integration of complex IPs… more
    Meta (12/08/25)
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  • Sr. Full Chip Physical Design Engineer

    SpaceX (Sunnyvale, CA)
    Sr. Full Chip Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... goal of enabling human life on Mars. SR. FULL CHIP PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and… more
    SpaceX (11/14/25)
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  • Design Automation DFT Engineer

    Broadcom (Fort Collins, CO)
    …Software Development Engineer in the Design For Test (DFT) team developing SoC ASIC products. They will define, develop, deploy and support the methodology, ... Account, please Sign-In before you apply.** **Job Description:** **DFT Design Automation Engineer ** Broadcom's ASIC Products Division is seeking a Design… more
    Broadcom (11/20/25)
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  • CPU Design Methodology Engineer

    NVIDIA (Hillsboro, OR)
    …to our environment. The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip build and ... We are now looking for a CPU Design Methodology Engineer ! The complexity of chip development has greatly increased...passionate about developing methodologies and automation solutions that enable SOC creation in the most optimized way. In this… more
    NVIDIA (11/20/25)
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  • Senior Principal DFT Design Engineer

    Cadence Design Systems, Inc. (Austin, TX)
    …who want to make an impact on the world of technology. We are looking for SoC / ASIC Digital Design Engineer with experience in Design for Test (DFT). An ... Requirements; US citizenship preferred. + Prior 5-15 years of professional experience in SoC / ASIC Digital Design with focus on Design for Test (DFT) +… more
    Cadence Design Systems, Inc. (12/05/25)
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  • Senior System Software Engineer - QNX BSP…

    NVIDIA (Santa Clara, CA)
    …for NVIDIA Tegra SOC + Development & bring-up activities for next-generation Tegra SOC + Work with the ASIC teams to enhance SW performance and ... an exciting opportunity for a talented Senior System Software Engineer to join our dynamic Automotive Team and help...virtualization support in the SOC + Extensively use Formal Methods to architect and… more
    NVIDIA (12/04/25)
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  • Physical Design Engineer

    MetaOption, LLC (Milpitas, CA)
    …Design Engineer - Milpitas, CA We're looking for a hands-on Physical Design Engineer to support complex SoC projects for our client who designs and delivers ... + BSEE with 5+ years experience; MSEE preferred + Strong experience in ASIC physical design and SoC development (28nm/16nm) + Proficient in ICC2/Innovus,… more
    MetaOption, LLC (11/20/25)
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  • Digital Design Engineer

    Meta (San Diego, CA)
    …flow for data path implementation. 16. SystemVerilog OVM/UVM experience. 17. Experience in SoC integration and ASIC architecture. 18. Experience with low power ... **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work...Computer Vision/Image Sensing IP. 2. Contribute to chip-level integration, verification plan development and verification . 3. Define… more
    Meta (10/30/25)
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