- NVIDIA (Santa Clara, CA)
- …C/C++ is essential. + Be familiar with hierarchical design approach, top -down design , SoC and system level verification. + Candidates will be working ... Accelerated UVM Testbenches). + Bring up SOCs on emulation, root causing SoC /Processor test fails and emulator environment issues. + We have continual collaboration… more
- Amazon (Sunnyvale, CA)
- …buses like AMBA AXI4 - Experience in integrating third party IP blocks, building top level modules, defining clock domains and power domains - Knowledge of ... help us create? The Role: As a Senior ASIC Design Engineer, you will be part of an advanced...image processing pipelines. They should be familiar with modern SoC architectures, various interconnect topologies such as AMBA AXI,… more
- Amazon (Cupertino, CA)
- …the right trade-offs. Key job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/DFT signal routing ... - BS in Electrical Engineering or related technical field - 5+ years in RTL design for SOC - 5+ years of VLSI engineering - 5+ years with code quality tools… more
- Broadcom (Fort Collins, CO)
- …with block owners and integration teams for smooth block- level to top - level convergence. + Support cross-functional design integration, providing ... computing, and networking SoCs. **Key Responsibilities** + Define and optimize top - level floorplan architecture, including die size estimation, hierarchy… more
- The Boeing Company (Huntsville, AL)
- …relevant experience: 3+ for level 3, 5+ for level 4, 10+ for level 5. + Experience using Electrical Design Automation (EDA) Tools such as (such as ... design and troubleshooting activities. **Typical Education & Experience:** Level 3: Education/experience typically acquired through advanced technical education… more
- The Boeing Company (Huntsville, AL)
- …Skills/Experience)** : + Years of related experience: 3+ for level 3, 5+ for level 4. + Experience in **digital circuit design ** . + Bachelor of Science ... on a chip ( ** SoC ** ). + Perform circuit analysis and **circuit design ** and **digital circuit design ** in **LTSpice** or similar. + Familiar with high-speed… more
- NVIDIA (Santa Clara, CA)
- …Ways to stand out from the crowd: + Experience with clocks controller, clocks logic design + Understanding of system level artifacts like power, noise, etc + ... us today. The clocks group is looking for a top -notch ASIC engineer to join the team. The Team...and CPU clocking. The team collaborates with the front design team to understand the clocking requirements for the… more
- SpaceX (Irvine, CA)
- …+ Define micro-architecture, implement the RTL in Verilog/System Verilog, integrate that in top level and deliver the fully verified, synthesis/timing clean ... Pay range: ASIC Design Engineer/Senior: $160,000.00 - $220,000.00/per year Your actual level and base salary will be determined on a case-by-case basis and may… more
- Meta (Sunnyvale, CA)
- …Define and track detailed test plans for the different modules and top level systems. Validation coverage includes SoC , low speed signal interface (I2C, I2S, ... **Summary:** Electrical Design Validation Engineer in Wearables Hardware will be...Python, and LabVIEW development experience 18. Board and system level validation and debugging experience 19. Experience with mobile… more
- BAE Systems (Wayne, NJ)
- …non-monetary recognition awards. Other incentives may be available based on position level and/or job specifics. **Senior Principal FPGA Design Engineer** ... supporting a variety of missions. BAE Systems is seeking experienced FPGA design engineers who are knowledgeable in all aspects of product development. Come… more