- Meta (Sunnyvale, CA)
- …to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a agile team working with the best ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC … more
- Amazon (Cupertino, CA)
- …instances, and we invite you to build them with us! As an Architecture Verification Engineer , you will be responsible for ensuring the functionality and ... performance of the SoC during the design process. You will work on...behaviors, among others. Key job responsibilities As an Architecture Verification Engineer you will: * Gain a… more
- Capgemini (Santa Clara, CA)
- …you're considering** Join a collaborative and forward-thinking team as a Design Verification Engineer , contributing to the validation of advanced System-on-Chip ... silicon solutions. **Your role** + Architect and implement scalable verification environments using SystemVerilog and UVM for IP and... environments using SystemVerilog and UVM for IP and SoC designs. + Develop test plans and coverage metrics… more
- Microsoft Corporation (Redmond, WA)
- …and optimize the Cloud infrastructure. We are looking for a **Senior Design Verification Engineer ** to join the team. **Responsibilities** + Establish yourself ... AXI-4 protocol base other complex IP/blocks or subsystems. + Experience with IP/ SOC verification for a full product cycle from definition to silicon, including… more
- Meta (Sunnyvale, CA)
- …protocols like PCIe/Ethernet/DDR, computer architecture and NOC. 4. Define and implement IP/ SoC verification plans, build verification test benches to ... Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Evaluate, develop...enable IP/sub-system/ SoC level verification . 5. Develop functional tests based on … more
- Meta (Sunnyvale, CA)
- …online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/IP/ SoC verification ... plans, build verification test benches to enable block/IP/sub-system/ SoC level verification . 2. Develop functional tests based on verification test plan.… more
- Meta (Madison, WI)
- …online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC verification plans, ... build verification test benches to enable IP/sub-system/ SoC level verification and develop functional tests based on verification test plan. 2.… more
- Arrow Electronics (Mountain View, CA)
- **Position:** Design Verification Engineer **Job Description:** Principal Accountabilities * Responsible for architecting Verification Environment for ASIC ... SoC and providing verification support from defining verification plan to multi-million gate product tapeout & for Test design and development * Develop… more
- Meta (Boston, MA)
- …to build IP and System On Chip ( SoC ) for data center applications. As a Formal Verification Engineer , you will be part of a team working with the best in the ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization....create formal environment and close coverage with targeted Formal Verification Techniques at IP, Subsystem and SoC … more
- Meta (Sunnyvale, CA)
- …entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with an ... of the art IPs or SoCs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers...UVM methodology 10. 2+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM… more