• Senior ASIC Engineer , IP…

    Google (San Diego, CA)
    Senior ASIC Engineer , IP Design , Silicon _corporate_fare_ Google _place_ Mountain View, CA, USA; San Diego, CA, USA **Mid** Experience driving progress, ... or equivalent practical experience. + 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture. + Experience with a scripting… more
    Google (12/06/25)
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  • Senior FPGA Design Engineer

    Capgemini (San Jose, CA)
    ** Senior FPGA Engineer - Bay Area...**About the Job You're Considering** 1. Hands-on experience with ** RTL design ** and **Vivado Flow (IP Integrator)** ... **multimeter** for testing and validation. **Your Skills and Experience** 1. Proficiency in ** RTL design ** and **Vivado Flow (IP Integrator)** . 2. Solid… more
    Capgemini (11/22/25)
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  • Senior ASIC Design Engineer

    Amazon (Sunnyvale, CA)
    …Fire tablets, Fire TV and Amazon Echo. What will you help us create? The Role: As a Senior ASIC Design Engineer , you will be part of an advanced design ... with team members across multiple disciplines * Develop detailed design specifications and documentation * Perform RTL ...detailed design specifications and documentation * Perform RTL coding and synthesis * Work with Partners/Suppliers to… more
    Amazon (12/12/25)
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  • Senior Circuit Design

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Circuit Design Engineer ! NVIDIA stands at the intersection of hardware excellence and AI breakthrough, where every line of ... across the entire silicon design flow, from micro-architecture and RTL design to back-end execution, including Custom/Semi-Custom Circuit Design more
    NVIDIA (10/10/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... and performance of NVIDIA's next generation GPUs + Partner with RTL and Design Verification engineers to ensure delivery meets performance and quality… more
    NVIDIA (11/26/25)
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  • Senior VLSI Physical Design

    NVIDIA (Westford, MA)
    …work, to amplify human inventiveness and intelligence. NVIDIA is seeking an outstanding Senior VLSI Physical Design Integration Engineer who is dedicated ... with front-end teams to resolve connectivity issues and implement design fixes to ensure physically-viable RTL netlists...and implement design fixes to ensure physically-viable RTL netlists are delivered to downstream physical design more
    NVIDIA (09/29/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …interpersonal skills and ability to collaborate with multiple teams. + Experience in RTL design (Verilog), verification and logic synthesis. + Strong coding ... The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible...closure to innovate and implement new Clocking topologies in RTL . + Collaborate with Physical design and… more
    NVIDIA (10/28/25)
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  • Senior SOC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! At NVIDIA, you'll collaborate with brilliant minds to build cutting-edge ... that power everything from AI to gaming! As a Senior SOC Design Engineer , you'll...+ Strong analytical and problem-solving skills + Expertise in RTL design , SOC integration, and design more
    NVIDIA (12/10/25)
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  • Senior FPGA Design Engineer

    RTX Corporation (Aguadilla, PR)
    …our mission today. This position is for a motivated Electrical or Computer Engineer to be involved in the design , implementation, verification, and integration ... selection + Requirements capture, ASIC / FPGA digital architecture and design using RTL , timing closure, verification, and system integration + Recommend new… more
    RTX Corporation (10/18/25)
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  • Senior ASIC Physical Design

    Cisco (Maynard, MA)
    …opportunities that working in a smaller ASIC team can provide. Your Impact As a Physical Design Engineer , you will play a key role in the full RTL -to-GDSII ... nodes. You will optimize floor planning and timing, analyze and improve backend design flows, and collaborate across teams to ensure the successful delivery of… more
    Cisco (11/27/25)
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