- Amentum (Fort Carson, CO)
- Amentum is seeking a highly motivated and dedicated Field Service Engineer to join our Position, Navigation and Timing Program. Team member must be open to ... their Defense Advanced GPS Receivers, Dismounted and Mounted Position, Navigation and timing equipment and loading updated Software and Firmware. The position is a… more
- NVIDIA (Hillsboro, OR)
- We are looking for a Senior CPU Design Engineer ! NVIDIA is seeking best-in-class CPU Design Engineers to design the world's leading CPUs. This position offers you ... Exercise logic design skills to optimize and meet performance, timing and power targets. + Deliver a synthesis/ timing... timing and power targets. + Deliver a synthesis/ timing clean design while working with the physical design… more
- NVIDIA (Santa Clara, CA)
- …this sounds like something you want to do, read on. SSG seeks a Lead Engineer to turbocharge the Design to Silicon Correlation charter. In this role, you will drive ... Speed and Power between design and silicon. You will collaborate with state-of-the-art timing closure teams and translate metrics to silicon. You will define the… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Logic Design Engineer with Physical Design background! As a member of our CPU Logic Design Team, you will be responsible for the design of ... working closely with the physical design team on implementation, synthesis and timing closure as well as working on micro-architectural definition and RTL… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This position offers ... Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/ timing clean design. + Collaborate and coordinate with architects, other… more
- NVIDIA (Austin, TX)
- …specialized algorithms for VLSI design. We are seeking a Senior R&D Software Engineer with proven experience in multiple areas of VLSI Physical Design Algorithms ... tools. These tools already outperform the industry's alternatives in high capacity timing closure and will advance even further with your contributions. + Improve… more
- Teradyne (North Reading, MA)
- …results. Opportunity Overview Our Hardware Engineering team is seeking an FPGA/ASIC Design Engineer to work with a multi-disciplined team to design, code, and verify ... designs. + Creation of physical design constraints for placement, timing closure and CDC + Implementation of designs into...using synthesis and place and route tools + Perform timing analysis using static timing analysis tools.… more
- Broadcom (San Jose, CA)
- …apply.** **Job Description:** **Broadcom is looking for a senior level RTL synthesis engineer . In this highly visible role, you will be contributing to connectivity ... using advanced optimization techniques and generating optimized Gate Level Netlist for Timing , Area, Power.** + **Debug the timing /area/congestion issues and… more
- Renesas (Duluth, GA)
- Principal Digital Design Engineer Job Description + Propose, architect, and design RTL in Verilog for use in a mixed-signal integrated circuit + Contribute as part ... verification reviews + Oversee digital backend design, including synthesis, static timing analysis, and logic equivalence checking + Create documentation targeting… more
- NVIDIA (Santa Clara, CA)
- …the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and ... evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing closure to innovate and implement new Clocking topologies in RTL. +… more