• Principal Engineer , VLSI…

    SanDisk (Milpitas, CA)
    … and verification in Verilog, RTL linting, clock domain crossing (CDC) analysis, design integration , synthesis, DFT, timing analysis and closure + Balance ... of innovation. We are looking for an experienced Staff Engineer to lead and deliver projects for our Memory... to lead and deliver projects for our Memory Design team. This is a great opportunity for a… more
    SanDisk (07/17/25)
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  • Principal design engineer…

    SanDisk (Milpitas, CA)
    …an exciting opportunity for you. ESSENTIAL DUTIES AND RESPONSIBILITIES: + Architect and design circuits at transistor level and gate level for leading-edge 3D NAND ... flash memory focusing on high-speed datapath circuit design and page buffers. + Perform block level and full chip circuit simulations to meet all performance… more
    SanDisk (07/17/25)
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  • Senior Technologist high speed datapath & Circuit…

    SanDisk (Milpitas, CA)
    …moving forward. **Job Description** ESSENTIAL DUTIES AND RESPONSIBILITIES: + Architect and design circuits at transistor level and gate level for leading-edge 3D ... flash memory, including page buffers, sense amplifiers and high-speed data path circuit design . + Perform block level and full chip circuit simulations to meet all… more
    SanDisk (07/29/25)
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  • Principal Engineer , VLSI…

    SanDisk (Milpitas, CA)
    …more years of relevant experience. + Knowledge and/or experience in non-volatile memory design (NAND flash memory cell operation in particular) is a big advantage + ... A strong design & device background and experience with evaluating new process technologies for use in design is preferred. + The ideal candidate must have… more
    SanDisk (07/17/25)
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  • Senior VLSI Design Engineering (New…

    SanDisk (Milpitas, CA)
    …of high-performance NAND flash, including new, most advanced 3-dimentional NAND memories. A design engineer will focus on developing technologies related to AI. ... strong foundation in analog and digital circuit fundamentals. + ** Physical Design Engineering** - Physical ...target power, performance, and area objectives. As a Digital Design Engineer , you will work on RTL… more
    SanDisk (07/19/25)
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  • Senior VLSI CAD R&D, Power and Timing…

    NVIDIA (Austin, TX)
    …used during optimization + Over time, this role can expand to other areas of physical design implementation and analysis tools + As with any software engineering ... algorithms in C++. We are seeking a CAD R&D Engineer excited to innovate in algorithms for large scale...NanoTime, SPICE, or other analysis tools + Background in physical design , timing, and/or power optimization algorithms.… more
    NVIDIA (05/22/25)
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  • Entry Level Logic Design Engineer…

    IBM (Rochester, MN)
    … Design and Timing Constraints: Understanding of physical design concepts and timing constraints, facilitating seamless integration with physical ... IBM, where growth and innovation thrive. **Your role and responsibilities** As a Logic Design Engineer , you will play a pivotal role in the end-to-end… more
    IBM (06/27/25)
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  • ASIC Design Efficiency Engineer…

    NVIDIA (Santa Clara, CA)
    …or deep learning accelerator design /architecture experience + Low power or physical (synthesis/ VLSI ) design experience + Scripting knowledge in ... We are now looking for an ASIC Design Efficiency Engineer . NVIDIA is seeking... targets. + Collaborate with architects, designers, verification and VLSI teams to craft the industries' top performing GPUs.… more
    NVIDIA (06/27/25)
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  • Senior ASIC Floorplan Design…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Floorplan Design Engineer ! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world's ... What you will be doing: + Working with architects, design leads, physical design leads...A deep hardware engineering background with a concentration in VLSI and/or Computer Architecture. + Experience in Verilog, System… more
    NVIDIA (05/13/25)
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  • Analog Design & Layout Engineer

    University of Southern California (Los Angeles, CA)
    … & Layout EngineerApply (https://usc.wd5.myworkdayjobs.com/ExternalUSCCareers/job/Marina-Del-Rey-CA/Analog- Design Layout- Engineer \_REQ20164538/apply) Viterbi ... such as 5G/6G and related domains to advanced digital design . The Prototype Integration and Engineering Services...in one or more of the following: analog circuit/RF design , digital circuit design , and physical… more
    University of Southern California (07/16/25)
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