- NVIDIA (Santa Clara, CA)
- …with circuit designers to ensure that features can be properly tested at wafer level, package level, and system level. + Partner with platform designers to ... define evaluation boards. + Collaborate with multi-functional teams to debug and resolve any HW/SW product issues. What we need to see: + BS or MS degree in EE/CE or equivalent experience + Effective collaboration and communication across different functional… more
- RTX Corporation (Goleta, CA)
- …as well as janitorial cleaning + Oversee CO2 tank testing + Oversee wafer monitoring, Lighthouse sensors, and Environmentally Controlled Area (ECA) event logs + ... Responsible for ECA annual recertification and certification of any reclassified areas in the cleanroom + Schedule, verify completion, log of FOD audits, and distribution of FOD audit findings to appropriate supervision + Regular monitoring of personnel within… more
- Quantinuum (Brooklyn Park, MN)
- …VALUE: * Project Management Professional (PMP) certification * Working knowledge of wafer fabrication methods used in making integrated circuits, sensors or MEMS ... (Microelectromechanical) devices * Experience seeing projects through the full life cycle including managing risk and budget * Resourcefulness and the ability to predict challenges to proactively head-off obstacles * Experience working with remote or… more
- IBM (Yorktown Heights, NY)
- …interacting with the SiView product team, configuring the MES for the specific wafer and chip processing in the lab, and ultimately, operation of the facility. ... It is envisioned that this role will be one of the leaders in the new Poughkeepsie lab as the team grows. **Required technical and professional expertise** Experience with Semiconductor MES Systems. Experience working in Semiconductor or Packaging fabrication… more
- Applied Materials (Santa Clara, CA)
- …with requestors, understand detail requirements, and communicate on results; monitor Wafer In Process and maintain throughput + Check performance of process ... system;order equipment and supplies, and coordinate with vendors and purchasing. Coordinate instrument repair and maintenance + Perform routine shut down procedureand set up equipment for experiments **Minimum Qualifications:** + Technical Diploma + 2-4years… more
- Applied Materials (Santa Clara, CA)
- …with requestors, understand detail requirements, and communicate on results; monitor Wafer In Process and maintain throughput + Check performance of process ... system; order equipment and supplies, and coordinate with vendors and purchasing. Coordinate instrument repair and maintenance + Perform routine shut down procedure and set up equipment for experiments **Minimum Qualifications:** + Technical Diploma + 2-4… more
- Quantinuum (Plymouth, MN)
- …ion etching, and process integration * Knowledge of on-chip photonics, wafer fabrication and fiber-to-chip coupling * Experience with Finite Element Modeling ... (mechanical, thermal, electrical, magnetic, optical and multi-physics) of MEMS-like structures * Experience with 2.5/3D semiconductor packaging * Experience working in an R&D environment * Published results within their field of research * Experience working… more
- Broadcom (Fort Collins, CO)
- …of functions in the production of semiconductor devices that include using wafer fabrication tools and processes, testing product, and delivering product to work ... areas. Must have an uncompromising dedication to following safety procedures and protocol. Uses written procedures and process specifications in completing assignments. Works collaboratively and professionally in a team environment to achieve production goals.… more
- Google (Austin, TX)
- …+ Experience in silicon development life cycle and manufacturing processes (eg, wafer fab, assembly, test). **Preferred qualifications:** + 5 years of experience ... managing cross-functional or cross-team projects. + Experience in technical program management within the semiconductor industry, with a focus on custom silicon, ASIC, or electronic component development. + Experience managing projects involving global… more
- Eurofins US Network (Santa Clara, CA)
- …plan. + Tester platform selection, design, and development of ATE hardware for wafer sort and final test. + Familiar with high-speed load board design techniques. ... + Proven track record of implementing ATE patterns to optimize tester resources and minimize ATE test time while maintaining product quality. + Strong knowledge and development of DFT techniques implemented in silicon that provide maximum defect and parametric… more
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