- Northrop Grumman (Linthicum Heights, MD)
- …is responsible for all aspects of semiconductor technology including design, mask making, wafer fabrication, test, and assembly. The candidate must be a strong team ... participant, have excellent communication skills, and be resourceful and multitalented. A strong understanding of semiconductor technology and microelectronic manufacturing test methodologies is essential. The **Senior Staff Semiconductor RF Test Engineer**… more
- Skyworks (Irvine, CA)
- …ways to characterize, analyze, and model of state-of-the-art BAW devices. + Analyze on- wafer statistics of key device parameters from which to develop models. Key ... outcomes that are desired: + Accelerate BAW roadmap for next generation devices having reduced size, performance, and cost. + Good at multitasking - working on 2-3 projects in parallel. + Geared toward being a team player - working seamlessly with other device… more
- Northrop Grumman (Linthicum Heights, MD)
- …Management experience within a production environment is preferred. + Semiconductor wafer level and packaged device testing experience. + Comprehensive knowledge and ... experience in RF measurement techniques including hands on experience with VNA. + Prior experience developing test software in C/C# or other programming languages. Salary Range: $112,600.00 - $169,000.00 The above salary range represents a general guideline;… more
- Amazon (Pasadena, CA)
- …development activities. You will develop and maintain detailed multi-project multi- wafer production schedules. You will identify resource constraints and conflicts, ... and provide leadership with the data to make informed and optimized decisions. This role will gather and assess the data (inputs and outputs) to push our fabrication team to run efficiently. You will partner with other TPMs and work across team boundaries and… more
- US Tech Solutions (Mckinney, TX)
- …This position is part of the Thick Films/Lids Group involved in wafer fabrication and related processing activities. The selected candidate will be responsible ... for manual tasks, operating semi and automated processing equipment, and performing rework. The role will include using microscopes, adhering to detailed written work instructions, and documenting non-conformances in our Factory Operating System (FOS). **Key… more
- Texas Instruments (Dallas, TX)
- …for next node analog nodes through photolithographic simulation and on mask/ wafer verification. + Data collection, simulation, calibration, and validation of optical ... proximity correction (OPC) models and recipes. + Partnering with internal/external fabs to transfer processes for advanced analog nodes. + Troubleshooting photolithographic patterning/alignment related issues for all fabs within TI. The person performing this… more
- RTX Corporation (Goleta, CA)
- …**What You Will Do:** + Monitor process and product yields across multiple ROIC wafer process lines at multiple ROIC foundries. + Collaborate with all levels of ... stakeholders (chief engineers, IC design engineers, product engineers, ROIC foundry engineers, process engineers, technicians, etc.) to drive continuous improvement solutions. + Lead RCCA and yield improvement teams and assist with scoping strategic… more
- Texas Instruments (Dallas, TX)
- …to co-optimize layout structures for printability + Analyze lithography process data and wafer yield data to identify root causes of patterning defects and implement ... corrective actions. + Evaluate and qualify new OPC/DFM software tools and methodologies. + Develop and maintain automation scripts for OPC/DFM flows. + Stay abreast of industry trends and advancements in lithography, OPC, and DFM. + Document best practices,… more
- Micron Technology, Inc. (Boise, ID)
- …**Responsibilities:** + Develop digital twins for fab technology co-optimization covering wafer , die, and package level models across tech nodes. + Collaborate ... with global teams to develop and deploy solutions that accelerate design, technology, and product development. + Apply a diverse range of computational and Gen-AI techniques to train robust models with sparse datasets. + Identify insights from predictive… more
- Texas Instruments (Santa Clara, CA)
- …+ Good understanding of clip attach, flip chip packaging and overview of wafer bumping processes + Knowledge of magnetics and high power density enterprise power ... modules (6V - 48V) is a plus + Strong knowledge of HV Bill of Materials (Mold compounds, Die Attach, DBC substrates, etc.) + Good understanding of industry & subcon HV packaging capabilities & roadmaps + Overview of high voltage discrete and power modules… more