- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- …To apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Leverage Design ... teams towards creating a first-pass silicon success. 5. Furthermore, the ASIC Engineer , Design Verification will define and implement IP/SoC verification… more
- Meta (Sunnyvale, CA)
- …as machine learning, video transcoding and network acceleration. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such… more
- Meta (Sunnyvale, CA)
- …efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization. We are looking for individuals with experience in backend… more
- Google (Mountain View, CA)
- Senior ASIC Engineer , IP Design , Silicon _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving problems, and ... or equivalent practical experience. + 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture. + Experience with a scripting… more
- SpaceX (Irvine, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out ... with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience… more
- Northrop Grumman (Annapolis Junction, MD)
- …part of our mission! Northrop Grumman Mission Systems (NGMS) is seeking a Sr. Staff ASIC Physical Design Engineer to support our growing engineering team in ... an Active DoD secret clearance + Experience in full product life cycle of ASIC Design + Proficient in backend ASIC design including synthesis and… more
- SpaceX (Bastrop, TX)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out ... with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience… more
- Lockheed Martin (Denver, CO)
- **Description:** Join Our Team as an ** ASIC & FPGA Design Engineer ** where you will support over 50 different programs and research and development \(R&D\) ... /FPGA team in the world, and are seeking a highly talented and motivated ** ASIC & FPGA Design Engineer ** who has a passion for microchip design and… more
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