• Integrated Circuit (IC) Layout

    MIT Lincoln Laboratory (Lexington, MA)
    …development, the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and ... CurvyCore o Programming in Perl, TCL, or Python o Experience with RF layout design At MIT Lincoln Laboratory, our exceptional career opportunities include… more
    MIT Lincoln Laboratory (03/12/25)
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  • Senior Mask Layout Design

    NVIDIA (Santa Clara, CA)
    Are you a Mask Layout Design Engineer who is seeking am amazing opportunity? We are looking for a Senior Mask Layout Design Engineer - someone ... equivalent experience) + At least 5+ years of hands-on layout design experience + Deep understanding of...design experience + Deep understanding of analog circuit layout concepts in submicron CMOS technologies. Validated… more
    NVIDIA (02/13/25)
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  • Senior Mask Layout Design

    NVIDIA (Santa Clara, CA)
    Are you interested in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing ... MSEE is a plus. + 8+ years of relevant mask design / layout experience...excellent to have. + Deep understanding of analog circuit layout concepts in submicron CMOS technologies +… more
    NVIDIA (04/13/25)
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  • Senior Mask Design Engineer…

    NVIDIA (Santa Clara, CA)
    …and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing ... and various other building blocks of a successful IC design in groundbreaking sub-micron CMOS technologies using...(or equivalent experience) + Minimum of 6 years of mask design / layout experience… more
    NVIDIA (03/06/25)
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  • Senior Mask Design Engineer…

    NVIDIA (Santa Clara, CA)
    …human creativity and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior ... Mask Layout Design Engineer! Someone...Mask Layout Design Engineer! Someone who is excited... Design . + Deep understanding of analog circuit layout concepts in submicron CMOS technologies. +… more
    NVIDIA (04/24/25)
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  • Senior Mask Design Engineer…

    NVIDIA (Santa Clara, CA)
    …the world. This is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer? If yes, We would love to hear from ... you! We are looking for a Senior Mask Layout Design Engineer, someone... Design . + Deep understanding of analog circuit layout concepts in submicron CMOS technologies. +… more
    NVIDIA (03/04/25)
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  • Electronic-Photonic Process Design Kit…

    MIT Lincoln Laboratory (Lexington, MA)
    …development, the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and ... changes. The engineer will collaborate with others involved in mask layout from basic layout ...o Programming in Perl, TCL, or Python o RF layout design experience o Experience with Cadence… more
    MIT Lincoln Laboratory (02/07/25)
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  • Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …needle! As a member of our Mixed Signal team, you will lead the design of CMOS high-speed interface circuits and mixed-signal circuits. Strong hands-on ... and verification of mixed-signal circuits + Supervise closely IC circuit/ mask designers, provide floorplan and layout guidelines...lab characterization of silicon + Tackle challenges of circuit design in deep submicron CMOS + Take… more
    NVIDIA (03/13/25)
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  • Principal Design DTCO Engineer

    Micron Technology, Inc. (San Jose, CA)
    …pathfinding activities for upcoming projects or tech nodes, including driving DTCO ( design - technology co-optimization) CMOS scaling efforts and architecture ... completed on time, and provide technical consultations on analog/core design and CMOS development. + Represent the...of NAND Flash memory analog/core circuits and their physical layout considerations. + Extensive experience in DTCO scaling for… more
    Micron Technology, Inc. (04/11/25)
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  • SRAM Circuit Design Engineer - New College…

    NVIDIA (Santa Clara, CA)
    …+ SRAM Circuit Design : Learn the specifications and architecture, design CMOS transistor- and gate-level circuit implementations, simulate behavior and ... (ATG) at NVIDIA is an organization of process, CAD, design , and test engineers that works closely with foundry...timing waveforms, supervise mask layout , and verify robust functionality. +… more
    NVIDIA (04/10/25)
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