- Capgemini (San Francisco, CA)
- …_ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Design Verification ( DV ) Engineer_ **Location:** _CA-San Francisco_ **Requisition ID:** ... **Job description:** Analog/Mixed-Signal Design Verification **Key responsibilities:** + Extract...Develop timing model for the circuit working with layout engineer . + This role will provide the ability to… more
- Cisco (San Jose, CA)
- …and Verification teams and Architects to understand chip architecture and drive design verification requirements. You'll work with SDK and Software teams as ... ASIC in deployment-mode applications * You will participate in the ASIC design verification and Emulation for Cisco high-end switching products. One of the… more
- Amazon (San Diego, CA)
- …technologies. In this role you will: . Implement a state of the art verification environment to facilitate testing of the RTL against reference Matlab/C models . ... be reused for the ASIC implementation . Run formal verification of complex blocks to ensure functional correctness ....blocks to ensure functional correctness . Work with the design and communication systems team and participate in system… more
- Qualcomm (San Diego, CA)
- …physical design (PD) team for physical implementation of the IPs - Work with design verification ( DV ) team to define test plans, verify the design ... C) for improving productivity and efficiency - Experience supporting mixed-signal design verification **Minimum Qualifications:** * Bachelor's degree in Science,… more
- Amazon (Austin, TX)
- …design from micro-architecture through physical design - Good knowledge of design verification ( DV ) simulation methodologies - Experience with large ... Silicon Optimization Engineering Team you'll be responsible for the design and optimization of hardware in our data centers....cost effective DFT methodologies * Perform RTL coding and Verification * Participate in Silicon debug and write scripts… more
- Micron Technology, Inc. (San Jose, CA)
- …models (LLMs) for the purpose of automated Silicon design and Design Verification ( DV ). The engineer is expected to build LLM based EDA workflows ... which assists the Design Engineers in building the next Micron product at higher velocity and greater quality. **Responsibilities:** + Optimize and fine-tune… more
- Qualcomm (Austin, TX)
- … DV Infrastructure Engineer focusing on the methodology and support of RTL design verification , you will work with design , verification , and CAD ... and external vendors. Collaborate with both CAD and front-end design teams in productizing solutions to enable faster and...and architect flow solutions tied to internal and vendor-based RTL/ Verification CAD tools. + Interact with DV … more
- Cadence Design Systems, Inc. (San Jose, CA)
- …In collaboration with R&D, provide in-depth technical assistance to help support advanced verification flows to secure design wins Champion the customer needs ... Experience in writing scripts (Perl, Python or Tcl) Strong software, HDL design and verification skills Experience with SystemVerilog, VHDL, Verilog,… more
- IBM (Houston, TX)
- **Introduction** Do you have a passion for Design Verification ? Are you good at breaking things and giving feedback to engineers in a succinct, reproducible ... work on high performing teams! We need fast, focused verification engineers to adjust with the changing...This role is responsible for leading and growing our Design Verification team. This includes defining and… more
- Qualcomm (Santa Clara, CA)
- …Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer , you will work with Chip Architects ... Plans and Testbenches for your functional domain. + Execute Verification Plans, including Design Bring-up, DV...correctness. + Experience in leading a small team of Verification engineers performing CPU Verification .… more