• Senior E/E & Semiconductor Engineer

    Capgemini (San Francisco, CA)
    …_Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Design Verification ( DV ) Engineer_ **Location:** _CA-San Francisco_ ... Develop timing model for the circuit working with layout engineer . + This role will provide the ability to...towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries… more
    Capgemini (03/18/25)
    - Related Jobs
  • CPU DV Infrastructure Engineer

    Qualcomm (Austin, TX)
    …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CPU DV Infrastructure Engineer focusing on the methodology and support of RTL ... solutions tied to internal and vendor-based RTL/Verification CAD tools. + Interact with DV team to diagnose the root cause of complex problems, propose solutions to… more
    Qualcomm (04/16/25)
    - Related Jobs
  • EVA DV Engineer

    Qualcomm (San Diego, CA)
    …Group > Video Systems, HW Architecture **General Summary:** As a Verification Engineer , you will be responsible for understanding the expected functionality of ... multimedia designs, specifically computer vision hardware IP and subsystem. You will work with the architects of these multimedia systems, as well as multimedia ASIC designers and SW engineers to plan and execute verification and validation of multimedia… more
    Qualcomm (04/03/25)
    - Related Jobs
  • Design Verification ( DV ) Engineer

    Cisco (San Jose, CA)
    …* Bachelors of Science Electrical Engineering, Computer Science or related degree with 4+ years of design verification experience or Masters degree in Electrical ... Engineering, Computer Science or related degree with 2+ years of design verification experience * 3+ years of experience in ASIC or Silicon * Prior experience working with System Verilog * Prior experience with ASIC Verification processes, methodologies, flows… more
    Cisco (04/28/25)
    - Related Jobs
  • IC DV Emulation Principal Application…

    Cadence Design Systems, Inc. (San Jose, CA)
    …Establish technical credibility and rapport with the customer and become the go-to expert for all of their technical inquiries and support In collaboration with R&D, ... At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Join our elite application engineering team for verification to work closely with the best AEs, PEs and R&D in EDA at a company listed in Fortune… more
    Cadence Design Systems, Inc. (05/05/25)
    - Related Jobs
  • Sr. ASIC Design Verification Engineer

    Amazon (San Diego, CA)
    …Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved ... and underserved communities around the world. The Role: Be part of Project Kuiper's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to… more
    Amazon (04/04/25)
    - Related Jobs
  • Senior E/E & Semiconductor Engineer

    Capgemini (San Jose, CA)
    **Job Role: Senior** **Mixed Signal DV Engineer ** **Job Location: San Jose CA** **Job description:** We are seeking Mixed Signal DV Engineer who will ... They will also develop timing model for the circuit working with layout engineer . **Key responsibilities:** + This role will provide the ability to directly… more
    Capgemini (03/19/25)
    - Related Jobs
  • Design Verification Engineer - Custom Power…

    Texas Instruments (Dallas, TX)
    …including Battery Chargers, PMICs, Camera Flash LED drivers etc. As an AMS DV Engineer , you will have responsibility for driving design execution excellence ... Love your job.** Texas Instruments is seeking Design Verification Engineer . In this role you will confirm the accuracy...analysis of specifications and reliability. As a Design Verification Engineer you may also review vendor capability to support… more
    Texas Instruments (02/10/25)
    - Related Jobs
  • GenAI Architect

    Micron Technology, Inc. (San Jose, CA)
    …language models (LLMs) for the purpose of automated Silicon design and Design Verification ( DV ). The engineer is expected to build LLM based EDA workflows which ... assists the Design Engineers in building the next Micron product at higher velocity and greater quality. **Responsibilities:** + Optimize and fine-tune LLMs for the purpose of automated corner case uncovering, design optimization and spec-to-design… more
    Micron Technology, Inc. (03/15/25)
    - Related Jobs
  • Sr Electro Mechanical Design Engineer

    Actalent (Newton, MA)
    Job Title: Senior ElectroMechanical Design Engineer Job Description The Senior ElectroMechanical Design Engineer will be a crucial member of the R&D team, ... device environment. Responsibilities + Lead the design of complex DV fixtures from initial requirements and concept generation through...+ Identify and implement improvements in the lineup of DV fixtures. + Assist in the development of firmware… more
    Actalent (04/29/25)
    - Related Jobs