• Formal Verification Engineer

    NVIDIA (Santa Clara, CA)
    As a Formal Verification Engineer at NVIDIA, you will work in the formal verification team for the industry's leading chips. We are looking for ... of formal methods. The engineer will own the task of formal verification of RTL units for next generation chip designs. This will involve the candidate… more
    NVIDIA (11/05/25)
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  • Sr. Formal Verification

    Amazon (Cupertino, CA)
    …to deliver high performance at low cost. Key job responsibilities - Develop formal verification plans, implement and verify state-of-the-art IP architectures. - ... & Career Growth Our team is dedicated to supporting new members. We have a broad mix of experience...related field - 7+ years of practical experience with formal verification as IP/Block owner, or equivalent… more
    Amazon (10/31/25)
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  • Software Engineer - Formal Methods

    Leidos (Arlington, VA)
    …relevant experience + Industrial/academic experience making significant contributions to formal verification , developing technologies such as program analysis, ... **Description** Leidos Innovations Center is looking for a Software Engineer in formal methods and cyber-physical systems who has experience with integrating and… more
    Leidos (11/13/25)
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  • Sr Principal Research Software Engineer

    RTX Corporation (Cambridge, MA)
    …Position may require some amount of overnight travel. **Qualifications We Prefer** + Formal verification tools such as SMT solvers and interactive theorem ... shine as a leader of an exceptional team while building technologies to support Formal Methods for verification of processes, networks, etc. You will model and… more
    RTX Corporation (10/30/25)
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  • Senior Verification Engineer

    Microsoft Corporation (San Jose, CA)
    …and make a difference to millions of people across the planet. As a Senior Verification Engineer in the Accelnet Hardware team, you will be responsible for ... Microsoft. This is a unique opportunity for a Senior Verification Engineer to see Register-Transfer Level (RTL)...functional coverage, and assertions, as well as familiarity with formal verification techniques. + 1+ year(s) of… more
    Microsoft Corporation (10/28/25)
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  • ASIC Design Verification Engineer II…

    Cisco (Maynard, MA)
    …modulation techniques such as QAM + Lab silicon validation experience + Knowledge of Formal Verification methodologies and tools such as Jasper + Ability to work ... inclusive future for all. **Your Impact** The ASIC Design Verification Co-Op Engineer will be a member...for this position, by specific state, are listed below: New York City Metro Area: $44,000.00 - $185,000.00 Non-Metro… more
    Cisco (11/16/25)
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  • Senior Design Verification Engineer

    Microsoft Corporation (Austin, TX)
    …and optimize the Cloud infrastructure. We are looking for a **Senior Design Verification Engineer ** to join the team. **Responsibilities** + Perform pre-silicon ... cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high...Perl + Hands-on experience in Formal property verification , formal verification of computational… more
    Microsoft Corporation (10/31/25)
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  • Senior Design Verification Engineer

    Google (Mountain View, CA)
    Senior Design Verification Engineer , Silicon _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving problems, and ... with an emphasis on computer architecture. + Experience in different verification techniques and methodologies including formal , Gate-Level Simulation, Unified… more
    Google (10/16/25)
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  • Design Verification Engineer

    Arrow Electronics (Mountain View, CA)
    **Position:** Design Verification Engineer **Job Description:** Principal Accountabilities * Responsible for architecting Verification Environment for ASIC ... functional and technical specification documents * Implement and maintain integrated end-to-end formal verification flow for the formal verification more
    Arrow Electronics (09/25/25)
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  • Design Verification Engineer - CPP

    Texas Instruments (Santa Clara, CA)
    **Change the world. Love your job.** Texas Instruments is seeking Design Verification Engineer . In this role you will confirm the accuracy of designs for analog ... on analysis of specifications and reliability. As a Design Verification Engineer you may also review vendor...circuits and systems, particularly power systems + Experience with formal verification methods and tools + Ability… more
    Texas Instruments (11/15/25)
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