- BAE Systems (Nashua, NH)
- …Electronic Combat Solutions Hardware Engineering Group is looking for an entry level FPGA Digital Design Engineer to support FPGA designs through ... BAE Systems has an open position for an entry level FPGA Digital Design Engineer ...timing closure, basic test bench development, lab testing, product support and FPGA security. Because of the… more
- The Boeing Company (Fairfax, VA)
- … micro-architecture, through HDL coding, and physical design realization (through gate - level netlists for ASIC designs) + Integrate DSP IP from Boeing's ... Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC/ FPGA Engineer on the Boeing Electronic Products team you will develop… more
- SpaceX (Hawthorne, CA)
- …willing to work extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay Range: DSP Engineer / Level I: $120,000.00 - $145,000.00/per year DSP ... DSP Engineer (Starshield) Hawthorne, CA Apply...Starshield leverages SpaceX's Starlink technology and launch capability to support national security efforts. While Starlink is designed for… more
- SpaceX (Hawthorne, CA)
- …for unique large-scale satellite RF systems + Work in close collaboration with hardware, FPGA , DSP , and software engineers to design and validate RF systems + ... work extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: RF Engineer / Level I: $120,000.00 - $145,000.00/per year RF Engineer / Level… more
- SpaceX (Hawthorne, CA)
- …design validation, qualification, and production + Work in close collaboration with hardware, FPGA , DSP , and software engineers to design and validate RF systems ... extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: RF SW Engineer / Level I: $120,000.00 - $145,000.00/per year RF SW Engineer /… more
- SpaceX (Redmond, WA)
- …and capabilities of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC and/or FPGA verification at block and system level + Write and review ... and weekends as needed COMPENSATION AND BENEFITS: Pay range: Design Verification Engineer / Level I: $120,000.00 - $145,000.00/per year Design Verification … more
- Leidos (San Diego, CA)
- **Description** The Leidos Innovations Center has an immediate opening for a **mid- level FPGA Engineer to work in San Diego, CA** . This is an exciting ... with senior staff to determine design changes to improve FPGA performance. + Support electrical engineering activities...with a multi-disciplined design team to design and integrate DSP applications for latest System on a Chip (SoC)… more
- Leidos (Arlington, VA)
- …The Advances Warfare Technology Division of the Leidos Innovation Center is looking for a FPGA DSP Firmware Design Engineer to work with a multi-disciplined ... scientists, etc) to design, develop, simulate, and integrate challenging DSP FPGA designs and RF sensor systems...algorithms and their implementation in MATLAB and FPGAs in support of a fast paced, multi-disciplinary design team. This… more
- Lockheed Martin (Orlando, FL)
- **Description:** You will be a highly skilled and experienced FPGA Design and Test Engineer at Lockheed Martin Missiles and Fire Control \(MFC\)\. This is an ... design\. **What You Will Be Doing** As a FPGA Design and Test Engineer , you will...apply for roles that align with your qualifications\. **Experience Level :** Experienced Professional **Business Unit:** MISSILES AND… more
- Huntington Ingalls Industries (Wright Patterson AFB, OH)
- …company slogan "Hard Stuff Done Right". HII Mission Technologies Division (HII-MT) is seeking a FPGA Engineer to join our dynamic team in Dayton, Ohio. The ideal ... signal processing. #LB-H1 Essential Job Responsibilities + Design, develop, and implement FPGA -based solutions for digital signal processing ( DSP ) applications +… more
Related Job Searches:
DSP,
DSP Engineer,
DSP FPGA,
DSP FPGA Engineer,
Engineer,
FPGA,
Level,
Level Engineer