• Layout Designer

    Texas Instruments (Phoenix, AZ)
    …+ Associate's degree in Engineering or related field of study or program certificate in Advanced IC Mask Layout Design + Minimum 3.0 out of 4.0 ... Love your job.** Texas Instruments is currently seeking a Layout Designer to join the team. In...and Digital design teams and the global layout design community + Understanding manufacturing rules… more
    Texas Instruments (11/08/25)
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  • Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …simulation, and verification of mixed-signal circuits + Supervise closely IC circuit/ mask designers, provide floorplan and layout guidelines + Support lab ... of our Mixed Signal team, you will lead the design of CMOS high-speed interface circuits and mixed-signal circuits....and bring up. What you'll be doing: + Lead design and implementation of high speed interface circuit +… more
    NVIDIA (10/21/25)
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  • Quantum Hardware Design Engineer

    IBM (Yorktown Heights, NY)
    …and related testsites * Connectivity/schematic capture for quantum hardware releases * Detailed mask layout and chip finishing for quantum hardware releases * EM ... components and full designs **Required technical and professional expertise** * RF/microwave/ IC design tooling (eg, Cadence Virtuoso/Innovus, Synopsys Custom… more
    IBM (11/14/25)
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  • Analog Mixed Signal Integrated Circuit…

    Google (Mountain View, CA)
    …internally built integrated circuits. + Oversee physical design and guide mask designers to create high quality layout . Information collected and processed ... + 8 years of experience in analog or mixed-signal IC design . + Experience in transistor-level schematic... design . + Experience in transistor-level schematic design , layout , simulation, and verification. + Experience… more
    Google (11/13/25)
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  • 3D Heterogeneous Integration Design

    Global Foundries (Malta, NY)
    …(geometry rules, electrical rules, etc.) that must be followed for an integrated circuit ( IC ) design to be manufacturable. + Advanced packaging liaison to the DM ... design rules , library device ( TSV) layouts, layout vs schematic( LVS) requirements , device model terminals....vehicle content specifications and the associated tapeout process (including mask reviews ). + Develop expertise in drafting test… more
    Global Foundries (11/09/25)
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  • Senior Staff Semiconductor RF Test Engineer

    Northrop Grumman (Linthicum Heights, MD)
    …engineering. ATL is responsible for all aspects of semiconductor technology including design , mask making, wafer fabrication, test, and assembly. The candidate ... architect role in the development and execution of mixed-signal/RF IC device test solutions for products in various fab...hardware skills including probe card and package part fixture/DIB design & coordinating layout & assembly +… more
    Northrop Grumman (10/07/25)
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