• Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …the world. This is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear from ... you! We are looking for a Senior Mask Layout Design Engineer , someone...+ You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.… more
    NVIDIA (11/13/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …the world. This is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear from ... you! We are looking for a Senior Mask Layout Design Engineer , someone...tools. + You'll work multi-functional with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.… more
    NVIDIA (08/28/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing ... using Cadence tools. + You'll work closely with mixed-signal design engineers to customize designs for integration...experience. + Minimum of 8+ years industry experience in Mask and Layout Design . + Working independently… more
    NVIDIA (10/15/25)
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  • Senior Analog and Mixed Signal Engineer

    NVIDIA (Santa Clara, CA)
    …blocks like comparators, digital state machines, high performance op-amps etc. + Work closely with mask design engineers to deliver the physical design ... today! We are part of the global circuits team at NVIDIA that design the state-of-the-art GPUs for all applications such as supercomputers, gaming consoles and… more
    NVIDIA (11/01/25)
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  • Process Engineer

    Fujifilm (Santa Clara, CA)
    …metal deposition; silicon or ceramic dry etching (DRIE); wet etching; wafer bonding; mask design software experience. + Experience with Piezo inkjet or other ... their printheads. We are a recognized leader in the manufacturing and design of durable and productive drop-on-demand inkjet printheads that power cutting-edge… more
    Fujifilm (08/27/25)
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  • Senior Analog Layout Engineer

    Capgemini (Minneapolis, MN)
    …to find the fastest way to complete layout * Utilizing advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent ... **About the job you're considering** * 10 years of experience in analog/mixed-signal layout design of deep submicron CMOS circuits and at least 3 years of recent… more
    Capgemini (10/23/25)
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  • Layout Designer

    Texas Instruments (Phoenix, AZ)
    design , implement and verify analog integrated circuits. You will support the design engineers to reach goals in precision, speed, area, reliability, power ... and ESD requirements. You will also work with PE/Packaging engineers to assure reliable production capability and proper data...field of study or program certificate in Advanced IC Mask Layout Design + Minimum 3.0 out… more
    Texas Instruments (11/08/25)
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  • Equipment and Foundry Project Engineer

    Northrop Grumman (Linthicum Heights, MD)
    …engineering. ATL is responsible for all aspects of semiconductor technology including design , mask making, wafer fabrication, test, and assembly. The selected ... (NGMC) of Northrop Grumman Mission Systems is seeking a **Equipment and Foundry Project Engineer Level 2 or 3** for our **Advanced Technology Lab (ATL)** - located… more
    Northrop Grumman (10/21/25)
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  • Associate Photolithography Engineer

    Northrop Grumman (Linthicum Heights, MD)
    …engineering. ATL is responsible for all aspects of semiconductor technology including design , mask making, wafer fabrication, test, and assembly. Candidates must ... as experienced in coat defect resolution, film-thickness optimization, root-cause-analysis, and design of experiments. The Photolithography Engineer will be… more
    Northrop Grumman (11/12/25)
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  • Dry Etch Sustaining Semiconductor Process…

    Northrop Grumman (Linthicum Heights, MD)
    …engineering. ATL is responsible for all aspects of semiconductor technology including design , mask making, wafer fabrication, testing, and assembly. **This is ... an independent and resourceful Dry Etch Sustaining Semiconductor Process Engineer . Advanced Technology Lab (ATL) - located outside of...other unit process engineers , operations, and integration engineers during the design and execution of… more
    Northrop Grumman (11/12/25)
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