• Mask Layout Designer

    Cubic Corporation (Durham, NC)
    …in IC or MEMS processes. + Proficiency using Design Workshop 2000 or similar mask layout tool is required. + Proficiency in running/modifying custom GPE scripts ... Job Duties and Responsibilities: + Prepare 3D models for mask inclusion and manufacture through the addition of design...responsible for ensuring all PolyStrata(R) designs conform to documented layout procedures and design rules via DRC. + Ensure… more
    Cubic Corporation (06/25/25)
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  • Senior Mask Layout Design Engineer

    NVIDIA (Santa Clara, CA)
    Are you interested in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing group ... experience. MSEE is a plus. + 8+ years of relevant mask design / layout experience + Tape-out experience with FinFET technology is required. Experience… more
    NVIDIA (04/13/25)
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  • Integrated Circuit (IC) Layout

    MIT Lincoln Laboratory (Lexington, MA)
    …has implemented vertically integrated in-house resources to facilitate design, lithographic mask layout , material growth and characterization, fabrication (eg, ... of a multi-disciplinary team responsible for the design and layout of lithographic masks for silicon-based, compound-semiconductor, and heterogeneous/hybrid… more
    MIT Lincoln Laboratory (05/29/25)
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  • Senior Mask Design Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …human creativity and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask ... a BSEE or equivalent experience with Minimum of 5+ proven experience in Mask and Layout Design. + Deep understanding of analog circuit layout concepts in… more
    NVIDIA (04/24/25)
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  • Senior Mask Design Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic ... BSEE or equivalent experience. + Minimum of 7+ years industry experience in Mask and Layout Design. + Deep understanding of analog circuit layout concepts in… more
    NVIDIA (04/17/25)
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  • Electronic-Photonic Process Design Kit (PDK)…

    MIT Lincoln Laboratory (Lexington, MA)
    …has implemented vertically integrated in-house resources to facilitate design, lithographic mask layout , material growth and characterization, fabrication (eg, ... layout changes. The engineer will collaborate with others involved in mask layout from basic layout cell creation and floor-planning to final tapeout.… more
    MIT Lincoln Laboratory (05/09/25)
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  • Principal Engineer Microelectronic…

    Northrop Grumman (Manhattan Beach, CA)
    …Northrop Grumman Microelectronics Center. Candidate will be primarily responsible for lithography mask layout using computer aided design (CAD) with Cadence ... (NGMC) of Northrop Grumman Mission Systems has an opening for a Microelectronics Layout Engineer to join our team of qualified, diverse individuals at our Space… more
    Northrop Grumman (05/31/25)
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  • Quantum Hardware Design Engineer

    IBM (Yorktown Heights, NY)
    …hardware testsites * Connectivity/schematic capture for quantum hardware releases * Detailed mask layout and chip finishing for quantum hardware releases * ... experience (Ansys Electronics Desktop, Keysight Momentum, Cadence Clarity etc.) * Mask /PCB layout experience (Cadence Virtuoso, KLayout, Synopsys Custom… more
    IBM (05/28/25)
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  • Lead Lithography Engineer

    IBM (Albany, NY)
    …EUV Lithography (10yr) * Lithography roadmap for BEOL technology definition (5yr) * Test vehicle/ mask layout design (5yrs) IBM is committed to creating a diverse ... is preferred. Familiarity with computational lithography (OPC/RET development) and test vehicle/ mask design is a plus. Generation of Intellectual Property for IBM… more
    IBM (05/15/25)
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  • Director, Engineering

    Skyworks (Irvine, CA)
    …stack design solution. * Work with process development team to design Process Development Vehicle mask layout for a new technology and define a new PDK in timely ... manner. * Optimize and automate NPI BAW stack design procedure, minimize simulation and measurement discrepancy, and enhance engineering communication system on BAW stacks for shortening our product development cycle. * Collaborate and openly debate with team… more
    Skyworks (05/31/25)
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