• Senior Mask Layout Design

    NVIDIA (Santa Clara, CA)
    …you interested in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing ... BSEE or equivalent experience. MSEE is a plus. + 8+ years of relevant mask design / layout experience + Tape-out experience with FinFET technology is… more
    NVIDIA (04/13/25)
    - Related Jobs
  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …creativity and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask ... Have a BSEE or equivalent experience with Minimum of 5+ proven experience in Mask and Layout Design . + Deep understanding of analog circuit layout more
    NVIDIA (04/24/25)
    - Related Jobs
  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …creativity and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a ... a BSEE or equivalent experience. + Minimum of 7+ years industry experience in Mask and Layout Design . + Deep understanding of analog circuit layout more
    NVIDIA (04/17/25)
    - Related Jobs
  • Integrated Circuit (IC) Layout

    MIT Lincoln Laboratory (Lexington, MA)
    …development, the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and ... radiation-hard CMOS, and other emerging integrated circuit technologies. The engineer will work in the Cadence environment, with which...in Perl, TCL, or Python o Experience with RF layout design At MIT Lincoln Laboratory, our… more
    MIT Lincoln Laboratory (05/29/25)
    - Related Jobs
  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Mask Design Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... hardworking, creative, and highly motivated engineers to work on the physical layout design and development of our next generation custom SRAM macro-IPs. As part… more
    NVIDIA (06/10/25)
    - Related Jobs
  • Electronic-Photonic Process Design Kit…

    MIT Lincoln Laboratory (Lexington, MA)
    …development, the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and ... engineer will collaborate with others involved in mask layout from basic layout ...o Programming in Perl, TCL, or Python o RF layout design experience o Experience with Cadence… more
    MIT Lincoln Laboratory (05/09/25)
    - Related Jobs
  • Quantum Hardware Design Engineer

    IBM (Yorktown Heights, NY)
    …hardware testsites * Connectivity/schematic capture for quantum hardware releases * Detailed mask layout and chip finishing for quantum hardware releases * ... experience (Ansys Electronics Desktop, Keysight Momentum, Cadence Clarity etc.) * Mask /PCB layout experience (Cadence Virtuoso, KLayout, Synopsys Custom… more
    IBM (05/28/25)
    - Related Jobs
  • Principal Engineer Microelectronic…

    Northrop Grumman (Manhattan Beach, CA)
    …the Northrop Grumman Microelectronics Center. Candidate will be primarily responsible for lithography mask layout using computer aided design (CAD) with ... Grumman Mission Systems has an opening for a Microelectronics Layout Engineer to join our team of...location in Redondo Beach, CA. SPF is where we design , manufacture, and test semiconductor products for internal and… more
    Northrop Grumman (05/31/25)
    - Related Jobs
  • BAW Filter NPI Engineer - Sr. Electrical…

    Skyworks (Irvine, CA)
    …Secondary Market:Los Angeles Job Segment: Electrical Engineering, Front End, Manufacturing Engineer , Testing, Design Engineer , Engineering, Technology Apply ... BAW Filter NPI Engineer - Sr. Electrical Engineer Apply...for RF front end modules which is including CAD layout and photo mask tapeout process as… more
    Skyworks (05/30/25)
    - Related Jobs
  • Lead Lithography Engineer

    IBM (Albany, NY)
    …* EUV Lithography (10yr) * Lithography roadmap for BEOL technology definition (5yr) * Test vehicle/ mask layout design (5yrs) IBM is committed to creating a ... is preferred. Familiarity with computational lithography (OPC/RET development) and test vehicle/ mask design is a plus. Generation of Intellectual Property… more
    IBM (05/15/25)
    - Related Jobs