• Senior Mask Layout Design…

    NVIDIA (Santa Clara, CA)
    Are you a Mask Layout Design Engineer who is seeking am amazing opportunity? We are looking for a Senior Mask Layout Design Engineer - someone ... team of Photonics, CMOS, Electronics, and Systems engineers + Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, general I/O's,… more
    NVIDIA (02/13/25)
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  • Senior Mask Layout Design…

    NVIDIA (Santa Clara, CA)
    Are you interested in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing ... experience. MSEE is a plus. + 8+ years of relevant mask design / layout experience + Tape-out experience with FinFET technology is required. Experience… more
    NVIDIA (04/13/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …human creativity and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior ... Mask Layout Design Engineer ! Someone who is excited to join a growing and multifaceted group of diverse individuals responsible for handling significant… more
    NVIDIA (04/24/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …the world. This is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear from ... you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing and dynamic group of diverse individuals responsible… more
    NVIDIA (03/04/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing ... have a BSEE (or equivalent experience) + Minimum of 6 years of mask design / layout experience + Detailed knowledge of EDA tools from Cadence, Mentor and… more
    NVIDIA (03/06/25)
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  • Integrated Circuit (IC) Layout

    MIT Lincoln Laboratory (Lexington, MA)
    …has implemented vertically integrated in-house resources to facilitate design, lithographic mask layout , material growth and characterization, fabrication (eg, ... of a multi-disciplinary team responsible for the design and layout of lithographic masks for silicon-based, compound-semiconductor, and heterogeneous/hybrid… more
    MIT Lincoln Laboratory (03/12/25)
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  • Mask Release Automation Engineer

    IBM (Albany, NY)
    **Introduction** We are seeking a highly motivated Mask Release Automation Engineer to join our cutting-edge IBM Research team focused on next-generation ... development. This cross-functional role bridges the gap between design automation and mask release operations, requiring a blend of software engineering skills and a… more
    IBM (05/05/25)
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  • Mask Assembly Automation Engineering…

    Skyworks (Irvine, CA)
    …package related considerations for wirebond, bumps or pillars + Provide physical mask accessories layout support for new developing processes Required Experience ... Mask Assembly Automation Engineering - Co-Op Apply now...in Electrical Engineering and Computer Engineering + Knowledge with MaskCad/ layout experience + Experience with Cadence layout more
    Skyworks (04/21/25)
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  • Principal / Senior Principal Microelectronic…

    Northrop Grumman (Manhattan Beach, CA)
    …Center (NGMC) of Northrop Grumman Mission Systems has an opening for a Microelectronics Layout Engineer to join our team of qualified, diverse individuals at our ... Northrop Grumman Microelectronics Center. Candidate will be primarily responsible for lithography mask layout using computer aided design (CAD) with Cadence… more
    Northrop Grumman (04/08/25)
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  • Electronic-Photonic Process Design Kit (PDK)…

    MIT Lincoln Laboratory (Lexington, MA)
    layout changes. The engineer will collaborate with others involved in mask layout from basic layout cell creation and floor-planning to final ... has implemented vertically integrated in-house resources to facilitate design, lithographic mask layout , material growth and characterization, fabrication (eg,… more
    MIT Lincoln Laboratory (02/07/25)
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