• Applied Materials (Santa Clara, CA)
    …for Applied Materials and its Supply Base.Provide advanced training and support to Packaging Engineer III.Performs other duties as assigned. Duties will vary ... build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips - the brains of devices we use every day. As the… more
    Talent (09/29/25)
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  • Senior Principal Microelectronics…

    Northrop Grumman (Apopka, FL)
    …our team as a **Senior Principal Microelectronics Semiconductor Photolithography Process Engineer ** for our Advanced Packaging Technology u-Line based out of ... **Apopka, Florida** . **Northrop Grumman's semiconductor foundry, packaging , integration, and test lines have unique capabilities of supporting a range of… more
    Northrop Grumman (09/16/25)
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  • Semiconductor Display Product Test…

    Meta (Sunnyvale, CA)
    …III-V material physics, especially LEDs and microLEDs 21. Expertise in advanced semiconductor packaging technologies such as COWOS, wafer reconstitution, InFO, ... We are looking for a highly skilled and driven Semiconductor Display Product Test Engineer to join...integration process. You will work cross-functionally with design, systems, packaging , and other XFN teams to ensure robust, scalable,… more
    Meta (09/24/25)
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  • Sr Principal Semiconductor Electroplating…

    Northrop Grumman (Apopka, FL)
    …and motivated **Senior Principal Microelectronics Semiconductor Electroplating Process Engineer ** for our Advanced Packaging Technology facility in **Apopka, ... meets the most demanding challenges. The **Senior Principal Microelectronic Semiconductor Electroplating Process Engineer ** will provide senior fabrication… more
    Northrop Grumman (08/08/25)
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  • Staff Semiconductor Process Engineer

    Lockheed Martin (Goleta, CA)
    …accredited college in Engineering, Physics, or related discipline\. * Experience in semiconductor packaging or FPA manufacturing in a cleanroom environment with ... as epoxy die attach/bonding, polishing, substrate removal, or Anti\-Reflection \(AR\) coating or semiconductor packaging techniques\. * Must be a US Citizen, as… more
    Lockheed Martin (08/21/25)
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  • Principal Application Engineer

    Henkel (Irvine, CA)
    … advanced packaging environment. + Good understanding for the latest Semiconductor Packaging trend. Especially 2.5D and 3D package + Expertise in ... Principal Application Engineer _ Semiconductor Advanced Package **_About_**... who provides technical engineering support for Henkel's Advanced Packaging Material products and responsible for developing in depth… more
    Henkel (08/20/25)
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  • Intern 2026: Hardware Engineer

    IBM (Yorktown Heights, NY)
    …chip architecture, design, fabrication and test to advanced chip packaging . Background knowledge of engineering disciplines, computer science, physics, or ... * Physic * Chemistry **Preferred technical and professional experience** * Semiconductor fabrication knowledge/coursework IBM is committed to creating a diverse… more
    IBM (09/19/25)
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  • Intern 2026: Software Engineer

    IBM (San Jose, CA)
    …towards state-of-the-art chip architecture, design, fabrication and advanced chip packaging . Background knowledge of computer science, data science, machine learning ... or other computational techniques are ideal skills for this role. Interns are expected to have the ability to analyze complex problems and apply creative solutions. **Required technical and professional expertise** * Computer Science * Information Technology *… more
    IBM (09/19/25)
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  • Optical Packaging Engineer

    Texas Instruments (Dallas, TX)
    **Optical Packaging Engineer ** **Location: Dallas, TX or Santa Clara, CA** **Group: Kilby Labs** **We can't predict what the future holds, but we know Texas ... Labs is seeking a highly motivated and experienced Optical Packaging Engineer to lead the development and...fibers to semiconductor chips.** + **Experience in semiconductor packaging technology, including die attach, wire… more
    Texas Instruments (09/02/25)
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  • Career Accelerator Program - Packaging

    Texas Instruments (Dallas, TX)
    …organizations to help with the design, development and analysis of different semiconductor packaging technologies to enable differentiation for TI's analog and ... to design and develop internal and external solutions for semiconductor packaging technologies, including Wirebond, Flip Chip,...prevent the use of high risk designs. As a Packaging engineer you will enjoy an environment… more
    Texas Instruments (09/06/25)
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