• ASIC FPGA Design and Verification Engineer…

    The Boeing Company (Mountain View, CA)
    …/FPGA technologies and determine the optimal parts, weighing Schedule, Cost, Risk, Area, Power (SCRAP) vs. performance + Implement FPGA/ ASIC with latest design ... & Weapons Systems has an exciting opportunity for multiple ** ASIC and/or FPGA Design and Verification Engineers** (Experienced, Lead,...and/or FPGA Design and Verification Engineers** (Experienced, Lead, or Senior ) to join us as part of our Boeing… more
    The Boeing Company (10/02/25)
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  • Senior High-Performance ASIC Timing…

    NVIDIA (Santa Clara, CA)
    …and timing methodologies. + Finding the right tradeoffs and balance between power /area/congestions/etc. What we need to see: + BS (or equivalent experience) in ... 5+ years' experience or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO implementation, and… more
    NVIDIA (09/23/25)
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  • Senior Signal and Power

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... be doing: + Work on crafting creative Signal and Power Integrity solutions to complex system design...in a dynamic cross-functional role to optimize package, PCB, ASIC , mixed signal circuit. What we need to see:… more
    NVIDIA (08/21/25)
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  • Senior Signal and Power

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... you'll be doing: + Work on crafting creative Signal Integrity solutions to complex system design problems. + Modeling...in a dynamic cross-functional role to optimize package, PCB, ASIC , mixed signal circuit. What we need to see:… more
    NVIDIA (09/09/25)
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  • Senior Signal and Power

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... you'll be doing: + Work on crafting creative Signal Integrity solutions to complex system design problems. + Modeling...in a dynamic cross-functional role to optimize package, PCB, ASIC , mixed signal circuit. What we need to see:… more
    NVIDIA (07/11/25)
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  • Sr. Signal and Power Integrity

    SpaceX (Redmond, WA)
    …travel may occasionally be required COMPENSATION AND BENEFITS: Pay range: Signal & Power Integrity Engineer/ Senior : $130,000 - $180,000/per year Your actual ... Sr. Signal and Power Integrity Engineer, Satellites (Starlink) Redmond,...associated ASICs + Work alongside RF engineers, antenna engineers, ASIC engineers, packaging engineers, mechanical engineers, thermal engineers, software… more
    SpaceX (09/02/25)
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  • Senior Applied Power Architect - GPU

    NVIDIA (Santa Clara, CA)
    …+ Analyze peak current, Di/Dt, IR and EM requirements, and collaborate closely with ASIC designers, Power Integrity , Packaging experts and Product engineers ... power AI, Automotive, GeForce, and Mobile products. We are looking for a Senior Applied Power Architect - GPU. What you'll be doing: + You will be responsible… more
    NVIDIA (08/27/25)
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  • Senior System Performance and Power

    NVIDIA (Santa Clara, CA)
    power /performance optimization. + Strong EE fundamentals on digital design, low power design, DVFS, control systems, signal integrity , timing, and micro ... be doing: + Build roadmaps of system level features to address low power , low noise, perf/watt efficient product needs by doing prototyping, use case analysis,… more
    NVIDIA (09/23/25)
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  • Senior Timing Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …Block Activity Power , and Dynamic Voltage-Frequency Scaling (DVFS), CDC, signal/ power integrity , etc. + Understanding of 3DIC, stacking, packing, ... human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies...Work on various aspects of STA, constraints, timing and power optimization. What We Need To See: + MS… more
    NVIDIA (07/19/25)
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  • Senior System SW Engineer, System…

    Palo Alto Networks (Santa Clara, CA)
    …innovation and collaboration, to execution. From showing up for each other with integrity to creating an environment where we all feel included. As a member ... few! At Palo Alto Networks, we believe in the power of collaboration and value in-person interactions. This is...Development - Assembler, Debugger, Simulator + Infrastructure to support ASIC team development and verification + ASIC more
    Palo Alto Networks (09/19/25)
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