• Senior ASIC Timing

    NVIDIA (Santa Clara, CA)
    …optimize design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and ... you'll be doing: + You will be responsible for all aspects of timing including, timing analysis and closure, timing environment, setting up constraints and… more
    NVIDIA (09/09/25)
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  • Senior ASIC Timing

    Cisco (Maynard, MA)
    Senior ASIC Timing Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1449290) + Location:Maynard, Massachusetts, US + Area of InterestEngineer ... 100G-1T coherent optical communications products. **Your Impact** This is a senior contributor role focused on delivering highly-complex ASICS in advanced technology… more
    Cisco (08/21/25)
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  • Senior ASIC Timing

    NVIDIA (Santa Clara, CA)
    …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... inventiveness and intelligence. What you'll be doing: + Drive timing analysis and closure of Nvidia's GPUs, CPUs, DPUs...DFX, Clocks, and other teams in coming up with timing closure strategy, creating timing constraints, driving… more
    NVIDIA (09/10/25)
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  • Senior ASIC Timing

    NVIDIA (Westford, MA)
    …life's work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding ... be doing: + You will drive physical design and timing of high-frequency and low-power DPUs and SoCs at...from RTL to gds2, including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and… more
    NVIDIA (08/13/25)
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  • Senior Principal ASIC Static…

    Northrop Grumman (Morrisville, NC)
    …career. Northrop Grumman Mission Systems, Digital Technologies Group, is seeking a Static Timing Engineer to join our team of highly qualified, diverse ... Secret clearance.** **Roles and Responsibilities:** + Responsible for static timing analysis on digital designs to ensure timing...+ Experience in the full product life cycle of ASIC Design + Effective communication and presentation skills and… more
    Northrop Grumman (07/11/25)
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  • Senior High-Performance ASIC

    NVIDIA (Santa Clara, CA)
    …5+ years' experience or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO implementation, ... intelligence. What you'll be doing: + Develop and execute timing closure plans for NVIDIA's next generation of high-performance...for CPU, GPU and SOC designs. + Owning static timing analysis and convergence of high-performance designs. + You… more
    NVIDIA (09/23/25)
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  • Senior ASIC Physical Design…

    NVIDIA (Santa Clara, CA)
    …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... work, to amplify human inventiveness and intelligence. What you'll be doing: + Drive timing analysis and closure of Nvidia's GPUs, CPUs, DPUs and SoCs at block… more
    NVIDIA (08/23/25)
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  • ASIC and/or FPGA Design & Verification…

    The Boeing Company (Huntington Beach, CA)
    …opportunity for multiple ** ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal)** to join us as part of our Boeing Electronic Products ... Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products...team and third-party IP as needed + Perform static timing analysis, LEC, CDC, linting, and other necessary checks… more
    The Boeing Company (09/25/25)
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  • Senior Reset and Boot ASIC

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... Make the choice to join us today. With the System- ASIC team, you will contribute to designing multiple products...be responsible for the RTL design, logic synthesis, and timing analysis of several modules. + Integrate modules into… more
    NVIDIA (09/30/25)
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  • Senior Electrical Engineer

    RTX Corporation (Cedar Rapids, IA)
    …are eligible for a security clearance **Security Clearance:** DoD Clearance: Secret ** Senior Electrical Engineer ** **- ASIC /FPGA (Onsite)** This position ... Technologies team. **What You Will Do:** + Requirements capture, ASIC / FPGA digital architecture and design using RTL,... / FPGA digital architecture and design using RTL, timing closure, verification, and system integration + Recommend new… more
    RTX Corporation (07/25/25)
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