- The Boeing Company (El Segundo, CA)
- …verification, and delivery of developmental aerospace computing hardware, demonstrating a high level of design creativity and positive impact; applying expertise ... in FPGA/ SoC /processor-based design and development, high-speed memory systems, communication interfaces, and radiation-hardening techniques, to design new… more
- Cisco (San Jose, CA)
- …and supporting our prototyping methodology + Option to engage in block- level RTL design or block or top - level IP integration + Collaborate with Software, ... Technical Leader with primary focus on FPGA Prototyping + Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds,… more
- Meta (San Diego, CA)
- …7+ years of experience as a Digital Design Engineer 9. Experience with top level integration using automation tools. 10. Experience in RTL coding, synthesis ... Digital Design Engineer Responsibilities: 1. Responsible for top - level or block level uArchitecture...and/or SoC Integration. 11. Experience in digital design … more
- NVIDIA (Santa Clara, CA)
- …C/C++ is essential. + Be familiar with hierarchical design approach, top -down design , SoC and system level verification. + Candidates will be working ... Accelerated UVM Testbenches). + Bring up SOCs on emulation, root causing SoC /Processor test fails and emulator environment issues. + We have continual collaboration… more
- Meta (Sunnyvale, CA)
- …and C/C++ based verification 10. 8+ years of experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies 11. ... 6. Support hand-off and integration of developed subsystems/IP blocks into larger SOC environments 7. Develop and drive continuous Design Verification… more
- Amazon (Sunnyvale, CA)
- …buses like AMBA AXI4 - Experience in integrating third party IP blocks, building top level modules, defining clock domains and power domains - Large breadth ... in consumer devices. They should be familiar with modern SoC architectures, various interconnect topologies such as AMBA AXI,...with ARM and various DSP ISA - Experience debugging system- level issues - Experience in entire design … more
- Meta (Sunnyvale, CA)
- …verification and UVM methodology 10. 2+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies 11. ... to validate new core IP or System on Chip ( SoC ) implementations. You will work closely with researchers, architects...track detailed test plans for the different modules and top levels 3. Drive Design Verification to… more
- Amazon (Cupertino, CA)
- …the right trade-offs. Key job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/DFT signal routing ... - BS in Electrical Engineering or related technical field - 5+ years in RTL design for SOC - 5+ years in VLSI engineering - 5+ years with code quality tools… more
- Arrow Electronics (San Jose, CA)
- …and supporting our prototyping methodology. + **Option to engage in block- level RTL design or block or top - level IP integration.** + Collaborate with ... **What candidate will Be Doing:** + Map multi-million gate SoC designs onto prototyping platforms, creating design ...based upon geographic location, work experience, education, and/or skill level . The pay ratio between base pay and target… more
- Amazon (Austin, TX)
- …implementing robust integration methodologies - Have deep expertise in high-performance SOC design , including clock/reset architecture, timing closure, and CDC ... chips - Drive technical decisions across multiple disciplines (RTL, timing, DFT, physical design ) - Ensure on-time delivery of complex SOC integration milestones… more