- Capgemini (Seattle, WA)
- **Job Description:** We are seeking a SoC Design Verification Engineer to join our team 100% onsite in either Seattle, WA or Santa Clara, CA. The ideal ... _ERD PPL US_ **Title:** _Lead E/E & Semiconductor Engineer - SOC Design Verification Engineer_ **Location:** _WA-Seattle_ **Requisition ID:** _078053_ more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a Senior Custom SOC /IP Verification Engineer to verify the next generation SoC and IP solutions! We are looking for special individuals ... to be. This role specifically requires a skilled ASIC Verification Engineer with expertise in cache coherency...be doing: + Responsible for ASIC design verification for various processing blocks within a SOC… more
- NVIDIA (Santa Clara, CA)
- …see how you can make a lasting impact on the world. Join NVIDIA as a Senior SoC Design Engineer developing innovative SoC solutions. What you'll be ... high-speed digital blocks. + Experience in negotiating solutions across design , verification , PD, and IP teams. +...interpersonal, communication, and teamwork skills. Come join our custom SOC design team working on innovative products!… more
- SpaceX (Sunnyvale, CA)
- Sr. ASIC/ SOC Verification Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. ASIC/ SOC VERIFICATION ENGINEER (SILICON ENGINEERING)...and weekends as needed COMPENSATION & BENEFITS: Pay range: Design Verification Engineer /Senior: $170,000.00… more
- Amazon (Austin, TX)
- …Singapore, and Japan, and customers across all industries. We are seeking experienced Design Verification Engineers to build the next generation of our cloud ... EE or CS or CE. - 8+ years of design verification experience using System Verilog and... including: custom blocks, IP blocks, sub-systems, and fullchip SOC system testing. - Experience using multiple verification… more
- SpaceX (Sunnyvale, CA)
- …to work extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Design Verification Engineer /Level I: $130,000.00 - $155,000.00/per year ... ASIC/ SOC DFT Engineer (Silicon Engineering) Sunnyvale,...Design Verification Engineer /Level II: $150,000.00 - $180,000.00/per year...Design Verification Engineer /Level II: $150,000.00 - $180,000.00/per year Your actual level… more
- Google (Sunnyvale, CA)
- SoC DFT Engineer , Google Cloud _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and mentoring more ... behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex...and its integration within AI/ML-driven systems. As a DFT Engineer you will be responsible for defining, implementing and… more
- Meta (Sunnyvale, CA)
- … to build IP and System On Chip ( SoC ) for data center applications. As a Design Verification Engineer , you will be part of an agile team working with the ... **Summary:** Meta is hiring ASIC Design Verification Engineer within...**Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC … more
- Meta (Sunnyvale, CA)
- … to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a agile team working with ... **Summary:** Meta is hiring ASIC Design Verification Engineer within...**Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC … more
- Meta (Sunnyvale, CA)
- …a first-pass silicon success. 5. Furthermore, the ASIC Engineer , Design Verification will define and implement IP/ SoC verification plans, build ... Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1....verification test benches to enable IP/sub-system/ Soc level verification , and develop functional tests… more
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