• Sr. SOC /ASIC Physical Design

    SpaceX (Sunnyvale, CA)
    Sr. SOC /ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... possible, with the ultimate goal of enabling human life on Mars. SR. SOC /ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging… more
    SpaceX (04/15/25)
    - Related Jobs
  • Sr. SOC /ASIC Physical Design

    SpaceX (Bastrop, TX)
    Sr. SOC /ASIC Physical Design Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out ... possible, with the ultimate goal of enabling human life on Mars. SR. SOC /ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging… more
    SpaceX (04/15/25)
    - Related Jobs
  • SoC Physical Design

    Google (Mountain View, CA)
    …or a related field, or equivalent practical experience. + 4 years of experience in Physical Design . + Experience in one or more synthesis/PnR tools (eg, Genus, ... + Experience with ASIC design flows and methodology of Physical design . + Experience in low power design Implementation including UPF/CPF,… more
    Google (03/29/25)
    - Related Jobs
  • Staff Engineer - HBM SOC

    Micron Technology, Inc. (Richardson, TX)
    …the industry! **Position Overview:** Micron is hiring a Staff Engineer - HBM SOC Physical Design ! You will be responsible for the design & ... + Resolving and improving design and flow issues related to physical design , identifying potential solutions, and working with CAD teams as needed. +… more
    Micron Technology, Inc. (04/29/25)
    - Related Jobs
  • SoC Power Design Engineer

    Qualcomm (San Diego, CA)
    …The candidate will work with frontend RTL, DFT, Synthesis, Design Verification and Physical Design teams during the SoC development. Also the candidate ... smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital...**Responsibilities/Duties:** + Work with frontend RTL, DFT, Synthesis, and Physical design teams in the development of… more
    Qualcomm (02/13/25)
    - Related Jobs
  • Senior E/E & Semiconductor Engineer

    Capgemini (Seattle, WA)
    **Job Role:** ** SOC Design Verification Engineer ** **Job location: Seattle WA** **Job Description:** We are looking for SOC Design Verification ... digital and software to support the convergence of the physical and digital worlds. Coupled with the capabilities of...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - SOC Design Verification… more
    Capgemini (04/15/25)
    - Related Jobs
  • Principal Engineer - HBM SOC

    Micron Technology, Inc. (Richardson, TX)
    …the lowest power per bit solutions in the industry. **Position Overview:** As a **Principal HBM SOC Design and Integration Engineer ** , you will design ... partners to ensure the success of our HBM roadmap. Your deep understanding of SOC Architecture, RTL Logic Design , IP Integration, high-speed interface design more
    Micron Technology, Inc. (03/21/25)
    - Related Jobs
  • SoC RTL Security Design

    Google (Sunnyvale, CA)
    …generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a SoC Design Engineer , you will join a team working ... on SoC -level RTL design for our data center accelerators. You will ...and debug design RTL. + Work with physical design teams to ensure design...design RTL. + Work with physical design teams to ensure design meets … more
    Google (04/26/25)
    - Related Jobs
  • SOC /ASIC Timing Signoff & Front-End…

    SpaceX (Irvine, CA)
    …weekends to meet critical deadlines, as needed COMPENSATION & BENEFITS: Pay range: Physical Design STA/Timing Engineer /Level I: $120,000.00 - $145,000.00/per ... SOC /ASIC Timing Signoff & Front-End Implementation Engineer ...year Physical Design STA/Timing Engineer /Level II: $140,000.00 - $170,000.00/per year… more
    SpaceX (04/15/25)
    - Related Jobs
  • Sr. SOC /ASIC Timing Signoff & Front-End…

    SpaceX (Irvine, CA)
    …generation and verification and timing closure + Work closely with chip architecture, design verification, physical design , DFT, and power teams to ... Sr. SOC /ASIC Timing Signoff & Front-End Implementation Engineer...+ Experience with test modes, mode merging to optimize physical design implementation and STA Signoff. +… more
    SpaceX (04/15/25)
    - Related Jobs