- SanDisk (Milpitas, CA)
- …project requirements and specifications. + Coordinate effectively with SoC Design, SoC Design Verification, ASIC Validation, DFT , Physical Design, ... technological innovation. ESSENTIAL DUTIES AND RESPONSIBILITIES: + Lead the comprehensive SoC development process for ASIC controllers utilized in SanDisk… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. We are looking for SoC / ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An ... preferred. + Prior 5-15 years of professional experience in SoC / ASIC Digital Design with focus on Design... Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT… more
- Amazon (Austin, TX)
- …trade-offs. Key job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/ DFT signal routing - As a key ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... in shaping the architecture, design, implementation, and verification of DFT IPs for our next-generation SoC products....verification of DFT IPs for our next-generation SoC products. You'll help drive innovation across the full… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is ... high-quality clocking and reset logic to various units in SOC and GPU ASIC . The complexity of...implementing Test plans for pre-silicon platforms. + Understanding of DFT /IST is optional. We have some of the most… more
- NVIDIA (Santa Clara, CA)
- …Together with other team members, we deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams. + Get involved in end-to-end ... today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is...cycle of ASIC execution starting from micro-arch, design implementation, design fixes,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Hardware SoC Architect! Do you want to be a part of Artificial Intelligence Revolution? Would you like to work with world-class ... systems architects and deep learning experts to define the next generation SoC ? NVIDIA is developing processor and system architectures that are at the forefront of… more
- SpaceX (Sunnyvale, CA)
- …bus routing, sequential pipeline planning and top level design for testability ( DFT ) planning + Collaborate with chip architects, ASIC engineers, package ... Sr . Full Chip Physical Design Engineer (Silicon Engineering)...cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing… more
- Cisco (San Jose, CA)
- …number of applications are received. Meet The Team You will collaborate with ASIC design teams in the Central Hardware Group, peer Test Engineers in Silicon ... Operations focusing on the ATE test bring-up. You will partner with the Cisco ASIC team to bring up tests, characterize units, and release the test program to… more
- Google (Fremont, CA)
- …qualifications:** + 15 years of experience in Application-Specific Integrated Circuit/System on Chip ( ASIC / SoC ) design, with a focus on both digital logic design ... Senior Silicon Pre-to-Post Validation Lead, Raxium _corporate_fare_ Google...and Design for Testability ( DFT ) implementation. + Experience with industry-standard EDA tools for… more
Locations:
California,
Texas