• Senior Design Verification Engineer, HW…

    Amazon (Sunnyvale, CA)
    …is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. We are a ... this role, you will be responsible for defining the verification methodology and implementing the corresponding test plan for...the full chip. You will participate in the design verification and bring-up of the chip and subsystems by… more
    Amazon (08/10/25)
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  • FPGA Verification Engineer

    L3Harris (Rochester, NY)
    …sea and cyber domains in the interest of national security. Job Title: FPGA Verification Engineer Job Code: 23774 Job Location: Rochester, NY or Columbia, MD Job ... per day, 5 days a week Job Description: L3harris is seeking digital verification engineers to support our development of secure tactical communication products. The… more
    L3Harris (08/08/25)
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  • Senior Design Verification Engineer

    Microsoft Corporation (Redmond, WA)
    …and optimize the Cloud infrastructure. We are looking for a **Senior Design Verification Engineer** to join the team. **Responsibilities** + Establish yourself as an ... integral member of a design verification team for the development of AI components with...on verifying functions and features. + Lead a pre-silicon verification team for the development of custom Intellectual Property… more
    Microsoft Corporation (08/08/25)
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  • Silicon Engineer, Design Verification

    Google (Goleta, CA)
    …equivalent practical experience. + 5 years of experience with design verification . + Experience verifying digital systems using SystemVerilog/UVM. + Experience with ... SoC Verification including CPUs, bus interfaces, or peripherals. + Experience...mixed-mode models for end-to-end DV coverage. + Experience with verification strategy definition, verification planning, coverage closure… more
    Google (08/08/25)
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  • Verification Scientist IV

    The US Pharmacopeial Convention (USP) (Rockville, MD)
    …**Brief Job Overview** This is a non-supervisory position within the Verification department of USP's Global Laboratory and Technical Operations (GLTO) division. ... will serve as the primary and/or secondary contact for participants in the verification program(s) and will manage verification projects, working closely with… more
    The US Pharmacopeial Convention (USP) (08/08/25)
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  • Principal / Senior Principal FPGA/ASIC…

    Northrop Grumman (Annapolis Junction, MD)
    …safe from undersea to space and cyberspace. We are seeking digital verification engineers for our development of full-custom digital and mixed signal circuits. ... HVL (SystemVerilog). Experience with SystemVerilog Assertions (SVA) and Universal Verification Methodology (UVM) is required. Successful candidates will have… more
    Northrop Grumman (08/08/25)
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  • Pharmacist 2, Inpatient - Central Order…

    University of Rochester (Rochester, NY)
    …internal equity considerations._ **Responsibilities:** GENERAL PURPOSE Centralized order verification pharmacists are responsible for optimizing safe and effective ... acute care setting. This is accomplished by performing medication order verification and providing evidence-based drug information to other healthcare professionals… more
    University of Rochester (08/07/25)
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  • Verification & Validation System Engineer

    Actalent (Los Angeles, CA)
    Job Title: Verification & Validation System EngineerJob Description The Verification & Validation System Engineer will delve deeply into component and subsystem ... designs to develop and define verification approaches and types, clearly outlined... approaches and types, clearly outlined in a Requirements Verification Compliance Matrix (RVCM). This role involves collaborating with… more
    Actalent (08/02/25)
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  • ASIC Engineer, Formal Verification

    Meta (Boston, MA)
    **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Formal ... Verification to build IP and System On Chip (SoC) for data center applications. As a Formal Verification Engineer, you will be part of a team working with the… more
    Meta (08/01/25)
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  • Design Verification Engineer

    Meta (Sunnyvale, CA)
    …from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with an industry-leading ... multiple state of the art IPs or SoCs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers and architects defining … more
    Meta (08/01/25)
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