- Cisco (San Jose, CA)
- ASIC Design Verification Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1430852) + Location:San Jose, California, US + Area of ... Work With:** You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely… more
- Cisco (San Jose, CA)
- Senior ASIC Design Verification Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1444077) + Location:San Jose, California, US + Area of ... being created in the industry. **Your Impact** + Participate in the ASIC design verification for Cisco high-end switching products. + Develop simulation… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This ... voltage regulation and silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and verify using advanced … more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- …To apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Evaluate, develop ... based on verification test plan. 6. Drive Design Verification to closure based on defined...NOC subsystems 15. 4. SystemVerilog/UVM methodology or C/C++ based verification 16. 5. ASIC development cycles 17.… more
- Qualcomm (San Diego, CA)
- …Engineering, Science, or a closely related field + 2+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred ... Qualifications** + Master's degree in Computer Science, Electrical Engineer , Computer Engineering, or a closely related field +...closely related field + 3+ years of experience with ASIC design and verification tools,… more
- Qualcomm (San Diego, CA)
- …develop solutions that meet performance, security, technology, and feature requirements. As a Design Verification Engineer , you will work with Chip ... a smarter, connected future for all. As a Qualcomm Design Verification Hardware Engineer , you...Science, Engineering, or related field and 4+ years of ASIC design , verification , validation, integration,… more
- Palo Alto Networks (Santa Clara, CA)
- …create an environment where we all win with precision. **Your Career** As a Design Verification engineer on the ASIC team, you will ensure that the ASICs ... military experience required - MSEE preferred + Minimum 7 years experience in ASIC design verification + Demonstrated success in taking ASIC products… more
- Google (Sunnyvale, CA)
- …digital logic at RTL using SystemVerilog for ASICs. + Experience in memory subsystem design verification . + Experience in Power aware verification , Gate ... to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a… more