- Amazon (Sunnyvale, CA)
- …Amazon Echo, and the Astro personal robot. What will you help us create? As an ASIC Methodology / CAD engineer you will create and maintain automated design ... flows that improve the efficiency and design quality of the finished ASIC products. Key job responsibilities - Develop automated flows for improving the SoC design… more
- Qualcomm (San Diego, CA)
- …Engineering Group, Engineering Group > ASICS Engineering **General Summary:** As a Timing Engineer , you will play a vital role in Timing analysis targeting the ... and Tempus. + You will facilitate and drive STA methodology for Qualcomm using PT-SI, Tempus and best in...contribution for STA timing sign off. + A timing Engineer should be able to understand all kind of… more
- NVIDIA (Santa Clara, CA)
- We are now looking for an ASIC Design Efficiency Engineer . NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and ... performance and efficiency. + Understand the design and implementation, develop methodology and infrastructure to drive Performance, Power and Area (PPA)… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention ... and intelligence. Make the choice to join us today. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading GPU and SoC's.… more
- Meta (Menlo Park, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...Meta 7. 3+ years of hands-on experience in SystemVerilog/UVM methodology or C/C++ based verification 8. 3+ years experience… more
- Qualcomm (San Diego, CA)
- …Controller and Advanced Memory NoCs based Subsystem Design Team is looking for ASIC Design Engineers for the next generation high speed LPDDR/DDR memory subsystems.. ... the rest of the system such as CPU, GPU, DSP, Multimedia Processors and the engineer is expected to be responsible for enabling high speed (1Ghz+) designs in QCT… more
- Cisco (San Jose, CA)
- Senior ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1431806) + Location:San Jose, California, US + Area of InterestEngineer - Hardware ... provider networks. Cisco's silicon team provides an outstanding, unique experience for ASIC engineers by combining the resources offered by a sizable multi-geography… more
- Meta (Menlo Park, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...cycles 9. 8+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification 10. 8+ years experience… more
- Meta (Menlo Park, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...experience 8. 6+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification 9. 6+ years of… more
- Cisco (San Jose, CA)
- …aspects of our systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a proven track record in high-performance products, ready ... ASIC Design Engineer - Design &...block or top-level IP integration + Helping develop efficient methodology to promote block level SDCs to fullchip, and… more