• Senior ASIC Physical Design…

    NVIDIA (Santa Clara, CA)
    …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... and/or full chip level. + Help in driving frontend and backend implementation including synthesis, equivalence checking, floor-planning, timing constraints, … more
    NVIDIA (11/22/25)
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  • Senior ASIC Timing Engineer

    NVIDIA (Santa Clara, CA)
    …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... timing and power convergence, as well as ECO implementation + Apply knowledge and experience to improve ...implementation + Apply knowledge and experience to improve timing convergence flows working with the methodology teams. What… more
    NVIDIA (12/10/25)
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  • ASIC Physical Design and Timing

    NVIDIA (Santa Clara, CA)
    …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... and/or full chip level. + Help in driving frontend and backend implementation including synthesis, equivalence checking, floor-planning, timing constraints, … more
    NVIDIA (10/17/25)
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  • Senior ASIC Engineer - SDC

    Cisco (San Jose, CA)
    **Sr. ASIC Engineer ** The application window is expected to close on 1/26/2026. The job posting may be removed earlier if the position is filled or if a ... year of ASIC experience. + Experience with microarchitecture and RTL implementation . + Experience with block/full chip SDC development in functional and test… more
    Cisco (12/03/25)
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  • ASIC Implementation Engineer

    Broadcom (San Jose, CA)
    …have a Candidate Account, please Sign-In before you apply.** **Job Description:** ASIC Implementation Engineer with demonstrated expertise in multiple ... place and route, clock methodology, power planning and analysis, timing closure, signal integrity and physical design checks. +...Engineering or Computer Engineering and 12+ years of related ASIC implementation experience; or Masters degree in… more
    Broadcom (11/21/25)
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  • Sr. SOC/ ASIC Physical Design…

    SpaceX (Sunnyvale, CA)
    …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering)...Develop/improve physical design methodologies and automation scripts for various implementation steps + Closely collaborate with the ASIC more
    SpaceX (12/16/25)
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  • Principal ASIC Design Engineer

    SpaceX (Sunnyvale, CA)
    …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... Principal ASIC Design Engineer (Silicon Engineering) Sunnyvale,... constraints for those IPs and support the physical implementation team (synthesis, timing closure, formality check)… more
    SpaceX (12/22/25)
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  • Senior Reset and Boot ASIC Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... Make the choice to join us today. With the System- ASIC team, you will contribute to designing multiple products...be responsible for the RTL design, logic synthesis, and timing analysis of several modules. + Integrate modules into… more
    NVIDIA (09/30/25)
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  • ASIC Digital Design Engineer

    Teledyne (Goleta, CA)
    …of being on a team that wins. **Job Description** **Job Summary:** ASIC Digital Design Engineer : Oversees definition, design, verification, and documentation ... from high-level design to synthesis, place and route, and timing and power use. Analyzes equipment to establish operation...windowing). + Finite State Machine and datapath design for ASIC modes. + Clock domain crossing and power-aware RTL… more
    Teledyne (11/21/25)
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  • ASIC Engineer , Physical Design

    Meta (Sunnyvale, CA)
    …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization....We are looking for individuals with experience in backend implementation from Netlist to GDSII in low power and… more
    Meta (12/20/25)
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