- Google (Sunnyvale, CA)
- …or a related field, or equivalent practical experience. + 10 years of experience in ASIC physical design and methodologies in advanced process nodes. + ... including timing, PDV, EMIR, package concerns, and power. + Experience with custom physical design , which may include custom datapath design , standard cell … more
- Cisco (San Jose, CA)
- …You will work with outstanding talent and vast ASIC development expertise in design , DV, DFT, physical design , and post-silicon validation The team ... What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching...Inclusive Communities, which unite people around commonalities or passions, lead the way. Together, we're committed to learning, listening,… more
- Amazon (Sunnyvale, CA)
- …Engineering. * 10+ years of experience in ASIC implementation. * Experience in leading physical design . * Strong exposure to UPF flow for low power design ... In this role you will: * As the implementation lead you will set up the flow for both...flow for various technology nodes. * Work with the ASIC design and DFT teams to understand… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is seeking a Technical Program Manager with ASIC design and development experience. This Technical Program Manager (TPM) will lead ... from technical details to big picture 12. Experience in managing ASIC design flow (architecture, micro-architecture, RTL, Synthesis, functional verification,… more
- SanDisk (Irvine, CA)
- …We are looking for a **PCIe expert** with a strong background in ** ASIC and Firmware development** to help define, architect, and deliver the next generation ... solid-state drive (SSD) products. In this high-impact role, you will drive the design of advanced SSD subsystems, write detailed specifications, and lead debug… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose,...participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device… more
- Cisco (San Jose, CA)
- …flows. * Your team will participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device models, bare die & stacked die, ... for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers...be in the Silicon One development organization as an ASIC DFT Product Lead in San Jose,… more
- Amazon (San Diego, CA)
- …Verification LEC DRC LVS etc. - Be single point contact for bugs and issues for physical design team - Build flow in TCL, Python to ensure quality and faster ... opportunity to shape the technical direction of critical IC design workflows and lead a team of...infrastructure - 7+ years of silicon EDA and/or digital ASIC design experience Preferred Qualifications - Master's… more
- Cisco (San Jose, CA)
- … in San Jose, CA. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive high-quality DFT verification. ... hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various… more
- Cisco (San Jose, CA)
- …as per need for verification robustness. * Guide and mentor a team of physical design engineers on project-level backend implementation and partner closely with ... Science, with 10+ year minimum of hands-on experience in ASIC implementation and Physical verification * Experience...Experience working with one or more of the following physical design tools, such as Cadence, Innovus,… more
Recent Jobs
-
Principal Systems Engineer - (MM) FDC Chief
- Raytheon (Aurora, CO)
-
Senior RF Data Link Engineer
- Raytheon (Tucson, AZ)