- Cisco (San Jose, CA)
- ASIC Design Verification Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1447177) + Location:San Jose, California, US + Area of ... Work With:** You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This ... voltage regulation and silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and verify using advanced … more
- Meta (Menlo Park, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- …To apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Evaluate, develop ... based on verification test plan. 6. Drive Design Verification to closure based on defined...NOC subsystems 15. 4. SystemVerilog/UVM methodology or C/C++ based verification 16. 5. ASIC development cycles 17.… more
- Meta (Sunnyvale, CA)
- …To apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... based on verification test plan. 3. Drive Design Verification to closure based on defined.... 8. 2. Track record of 'first-pass success' in ASIC development cycles. 9. 3. Experience in block/IP/sub-system and/or… more
- Meta (Menlo Park, CA)
- …To apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... the highest design quality. 3. Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools, and… more
- Qualcomm (San Diego, CA)
- …develop solutions that meet performance, security, technology, and feature requirements. As a Design Verification Engineer , you will work with Chip ... a smarter, connected future for all. As a Qualcomm Design Verification Hardware Engineer , you...Science, Engineering, or related field and 4+ years of ASIC design , verification , validation, integration,… more
- Amazon (Sunnyvale, CA)
- … verification , preferably in communication systems - Familiarity with Matlab - Modem design verification experience - System C or Matlab model : development ... to the program . Participate in the validation of ASIC implementations in Verilog/SystemVerilog . Run formal verification...blocks to ensure functional correctness . Work with the design and communication systems team and participate in system… more