- Google (Mountain View, CA)
- …Science, or a related field, or equivalent practical experience. + 10 years of experience in CPU memory subsystem design . + 10 years of experience in ... on microarchitecture and RTL design for the next generation CPU subsystem . + Review/propose performance enhancing microarchitecture features, and work… more
- Qualcomm (San Diego, CA)
- …**General Summary:** Next Generation, High-Speed, Memory and Cache Controller and Advanced Memory NoCs based Subsystem Design Team is looking for ASIC ... + On-chip tightly coupled SRAM & L3 cache controller architecture/ design + Experience with x86 or ARM CPU...architecture/ design + Experience with x86 or ARM CPU /bus architectures + Ordering of memory transactions… more
- Qualcomm (San Diego, CA)
- …good understanding of and conducts research on industry trends and innovations in memory subsystem to ensure solutions and deliverables align with best ... definition and design of Platform infrastructure HW components such as Memory controllers, System cache, System MMU and Interconnect that are implemented in all… more
- Qualcomm (San Diego, CA)
- …CPU micro-architectural security constructs and countermeasures + Hands on HW design experience for CPU sub-components + Experience in automotive ... blocks for enabling various confidential computing technologies **Role and Responsibilities:** + Design and implement new CPU security features and functions to… more
- Qualcomm (Santa Clara, CA)
- …CPU and SOC level micro-architectures. You will work on a selected part of the CPU Design Verification to ensure that it functions to the standards of being ... Qualcomm Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer,… more
- Qualcomm (Santa Clara, CA)
- …for datacenter SoCs, including experience in microarchitecture and design of coherent CPU subsystems. CPU subsystem microarchitecture involves design ... our team. If you possess a deep understanding of CPU system design and have a passion...of RAS solution for multiple functional blocks of a CPU /SoC like L2/L3, directory, interconnects, memory controllers,… more
- Qualcomm (San Diego, CA)
- …blocks and modules of Adreno GPU architecture across shader processing, graphics pipelines, memory subsystem and interconnect, and power and system level ... design Identify advanced ways to optimize hardware design for better performance, power, and cost Evaluate the...is desired. + Experience in designing RTL for GPU, CPU , DSP, Machine-Learning, cache, controller, video, display, camera blocks… more
- Meta (Menlo Park, CA)
- …experience. 6. 7+ years of professional C/C++ experience 7. Knowledge of computer architecture, CPU and memory subsystem , and OS-level resource management 8. ... the data patterns that we see. This guides our design and implementation of data structures, libraries, and performance...RPC, etc. 2. Analyze resource utilization in server applications ( CPU , GPU, memory , network, etc.), identify bottlenecks,… more
- Google (Mountain View, CA)
- …(PPA) under peak current and thermal constraints with a focus on the CPU subsystem . + Define power key performance indicators and SoC/IP-level power ... and power analysis. + 8 years of experience in SoC power management or low power design /methodology. + Experience in CPU power in mobile SoCs from CPU … more
- NVIDIA (Santa Clara, CA)
- …eg, CUDA, OpenACC, OpenMP, MPI, pthreads, TBB, etc. + In-depth expertise with CPU /GPU architecture fundamentals, especially memory subsystem . + Domain ... for High-Performance Databases! Would you enjoy researching new algorithms and memory management techniques to accelerate databases on modern computer architectures?… more
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