• DFT Engineer , Google Cloud

    Google (Sunnyvale, CA)
    DFT Engineer , Google Cloud _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and mentoring more junior ... on TPU architecture and its integration within AI/ML-driven systems. As a DFT Engineer , you will be responsible for defining, implementing and deploying advanced… more
    Google (12/13/25)
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  • Staff DFT Engineer

    Broadcom (San Jose, CA)
    …apply.** **Job Description:** Broadcom's CSG division is seeking candidates for a Staff DFT engineer position. The successful candidate will be responsible for ... DFx solutions while optimizing the cost for test. **Responsibilities** + Own IP DFT architecture, implementation, verification, signoff STA constraints for DFT +… more
    Broadcom (11/26/25)
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  • Sr. SOC/ASIC DFT Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    Sr. SOC/ASIC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars ... the ultimate goal of enabling human life on Mars. SR. SOC/ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets… more
    SpaceX (01/07/26)
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  • ASIC/SOC DFT Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    ASIC/SOC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... with the ultimate goal of enabling human life on Mars. ASIC/SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets… more
    SpaceX (12/27/25)
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  • Senior DFT Engineer

    NVIDIA (Santa Clara, CA)
    …Make the choice to join us today. NVIDIA's DFX team is looking for an exceptional DFT Engineer to help shape the future of compute. As stewards of the entire ... teams to drive scalable, automated solutions. + Co-architect novel DFT strategies alongside VLSI and Product Engineering teams to...field + 5+ years of hands-on experience in Design-For-Test ( DFT ) + Deep knowledge of DFT tools,… more
    NVIDIA (10/17/25)
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  • DFT Quality Engineer

    Broadcom (San Jose, CA)
    …have a Candidate Account, please Sign-In before you apply.** **Job Description:** ** DFT Quality Engineer ** Broadcom's ASIC Product Division is seeking candidates ... for a DFT Quality Engineer position at our San Jose design center in CA. In this role, you will play a crucial part in ensuring the Quality, Yield & Test Costs… more
    Broadcom (12/12/25)
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  • HBM/DDR/SerDes DFT Verification Lead…

    Broadcom (San Jose, CA)
    …San Jose, California Development Center. We are seeking a highly skilled HBM and SerDes DFT Verification Engineer to join our dynamic team. In this role, you ... our HBM, DDR and SerDes designs through comprehensive Design for Test ( DFT ) verification strategies. You will work collaboratively with cross-functional teams to… more
    Broadcom (12/06/25)
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  • DFT Engineer

    Broadcom (San Jose, CA)
    …you apply.** **Job Description:** Broadcom's CSG division is seeking candidate for a DFT lead position. The successful candidate will be responsible for leading most ... network switching ASIC DFx (Design for Test/debug & manufacturability) from DFT architecture, to implementation, verification, timing closure, ATE pattern bringup. .… more
    Broadcom (11/19/25)
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  • Senior DFT Engineer

    NVIDIA (Santa Clara, CA)
    …NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the ... + In addition, you will help develop and deploy DFT methodologies for our next generation products. + You...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
    NVIDIA (10/29/25)
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  • Senior Principal DFT Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …an impact on the world of technology. We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate knowledge and ... SoC/ASIC Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT...( DFT ) + Should possess intimate knowledge of DFT insertion flows + Basic scan chain insertion using… more
    Cadence Design Systems, Inc. (10/30/25)
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