- Cisco (San Jose, CA)
- Design Verification ( DV ) Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1451624) + Location:San Jose, California, US + Area of ... Verification teams and Architects to understand chip architecture and drive design verification requirements. You'll work with SDK and Software teams as part… more
- Amazon (San Diego, CA)
- …technologies. In this role you will: . Implement a state of the art verification environment to facilitate testing of the RTL against reference Matlab/C models . ... be reused for the ASIC implementation . Run formal verification of complex blocks to ensure functional correctness ....blocks to ensure functional correctness . Work with the design and communication systems team and participate in system… more
- Micron Technology, Inc. (San Jose, CA)
- …models (LLMs) for the purpose of automated Silicon design and Design Verification ( DV ). The engineer is expected to build LLM based EDA workflows ... and greater quality. **Responsibilities:** + Develop LLM applications to automate electronics design and verification . + Optimize and fine-tune LLMs for the… more
- SpaceX (Sunnyvale, CA)
- …to work extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Design Verification Engineer /Level I: $130,000.00 - $155,000.00/per year ... ASIC/SOC DV Engineer (Silicon Engineering) Sunnyvale, CA Apply...Design Verification Engineer /Level II: $150,000.00 - $180,000.00/per year Your… more
- Amazon (Sunnyvale, CA)
- …to contribute to a groundbreaking new system with few legacy constraints. The FPGA verification engineer will work with design and systems teams to ... Enhance your leadership skills while contributing to a dynamic DV team * Create reusable Verification IP...verification simulation solutions. The FPGA verification engineer will work with FPGA design and… more
- BAE Systems (San Diego, CA)
- …may be available based on position level and/or job specifics. **Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **117193BR** ... career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect,...your leadership skills while leading small to medium sized DV teams + Create reusable Verification IP… more
- Google (Mountain View, CA)
- Staff ASIC Design Verification Engineer , Platforms and Devices _corporate_fare_ Google _place_ Mountain View, CA, USA **Advanced** Experience owning outcomes ... scripting languages, Software (SW) development frameworks and their impact on Design Verification ( DV ). + Experience creating and using verification… more
- US Tech Solutions (Goleta, CA)
- …Months** **Job Description:** + We are seeking a highly skilled and meticulous SystemVerilog/UVM Design Verification Test Engineer to play a crucial role in ... (Required):** + 3+ years of professional experience specifically in IC/SOC Design Verification ( DV ). + Mandatory expert-level proficiency in SystemVerilog… more
- Meta (Sunnyvale, CA)
- … and project planning 2. Deliver quality RTL in collaboration with Digital Verification ( DV ) 3. Support back end physical design (PD) through STA and SDCs 4. ... **Summary:** We are looking for a Digital Design Engineer to support our Reality...and ASIC architecture 10. Skilled in micro-architecture, RTL coding, design verification and SoC Integration of complex… more
- Microsoft Corporation (Mountain View, CA)
- … experience. + 3 years of developing UVM-based testbenches or completion of formal design verification ( DV ) training. **Other Requirements:** Ability to meet ... across Microsoft cloud hardware. We are seeking a motivated **Senior** ** Verification Engineer ** who is enthusiatic about cutting-edge hardware acceleration… more
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